[PATCH 5/8] of: Add Tegra124 EMC bindings
Mikko Perttunen
mperttunen at nvidia.com
Thu Jul 31 04:05:50 PDT 2014
On 31/07/14 13:48, Mikko Perttunen wrote:
>>
>> I see that the TRM implies the whole 4-bit field is RAM code, rather
>> than there being 2 separate 2-bit fields for RAM code and boot device
>> code. Can you please file a bug against the TRM to document this
>> correctly? (The details of which bits are which are visible on the
>> Jetson TK1 schematics for example).
>
> Yes, I'll file a bug.
On a closer look, the downstream kernel has been recently updated to
consider the whole 4 bits the ram code. The relevant bug also has a
comment mentioning that starting from T124, the whole 4 bits is
considered the RAM code.
>
> - Mikko
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