[PATCH v3] ARM: zynq: DT: Add CAN node
Michal Simek
michal.simek at xilinx.com
Mon Jul 28 02:17:31 PDT 2014
Add node describing Zynq's CAN controller.
Signed-off-by: Michal Simek <michal.simek at xilinx.com>
---
Changes in v3:
- Fix clocks description for can1
Changes in v2:
- Add can1
- Enable can0 for zc702
- Use status property
arch/arm/boot/dts/zynq-7000.dtsi | 26 +++++++++++++++++++++++++-
arch/arm/boot/dts/zynq-zc702.dts | 4 ++++
2 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index ef11dab30446..6cc83d4c6c76 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -71,7 +71,31 @@
interrupts = <0 7 4>;
interrupt-parent = <&intc>;
clocks = <&clkc 12>;
- };
+ };
+
+ can0: can at e0008000 {
+ compatible = "xlnx,zynq-can-1.0";
+ status = "disabled";
+ clocks = <&clkc 19>, <&clkc 36>;
+ clock-names = "can_clk", "pclk";
+ reg = <0xe0008000 0x1000>;
+ interrupts = <0 28 4>;
+ interrupt-parent = <&intc>;
+ tx-fifo-depth = <0x40>;
+ rx-fifo-depth = <0x40>;
+ };
+
+ can1: can at e0009000 {
+ compatible = "xlnx,zynq-can-1.0";
+ status = "disabled";
+ clocks = <&clkc 20>, <&clkc 37>;
+ clock-names = "can_clk", "pclk";
+ reg = <0xe0009000 0x1000>;
+ interrupts = <0 51 4>;
+ interrupt-parent = <&intc>;
+ tx-fifo-depth = <0x40>;
+ rx-fifo-depth = <0x40>;
+ };
gpio0: gpio at e000a000 {
compatible = "xlnx,zynq-gpio-1.0";
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
index 5e09cee33d42..835c3089c61c 100644
--- a/arch/arm/boot/dts/zynq-zc702.dts
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -29,6 +29,10 @@
};
+&can0 {
+ status = "okay";
+};
+
&gem0 {
status = "okay";
phy-mode = "rgmii";
--
1.8.2.3
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