[PATCH] ARM: mvebu: armada xp: Generalize use of i2c quirk
thomas.petazzoni at free-electrons.com
Fri Jul 25 13:05:47 PDT 2014
Dear Andrew Lunn,
On Fri, 25 Jul 2014 19:22:31 +0200, Andrew Lunn wrote:
> A second product has come to light which makes use of the A0 stepping
> of the Armada XP SoC. A0 stepping has a hardware bug in the i2c core
> meaning that hardware offload does not work, resulting in the kernel
> failing to boot. The quirk detects that the kernel is running on an A0
> stepping SoC and disables the use of hardware offload.
> Currently the quirk is only enabled for PlatHome Openblocks AX3. The
> AX3 has been produced with both A0 and B1 stepping SoCs. The second
> product is the Lenovo Iomega IX4-300d. It seems likely that this
> device will also swap from A0 to B1 SoC sometime during its life.
> If there are two products using A0, it seems likely there are more
> products with A0. Also, since the number of A0 SoCs is limited, these
> products are also likely to transition to B1. Hence detecting at run
> time is the safest option. So enable the quirk for all Armada XP
> Tested on an AX3 with A0 stepping.
> Signed-off-by: Andrew Lunn <andrew at lunn.ch>
> arch/arm/mach-mvebu/board-v7.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Thomas Petazzoni <thomas.petazzoni at free-electrons.com>
Arnd's solution doesn't work, because it doesn't fix at all the problem
for the new Lenovo platform or any other new platform.
Only minor nit: s/B1/B0/ in the commit log.
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
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