[PATCH v3 07/12] usb: chipidea: add a usb2 driver for ci13xxx
Russell King - ARM Linux
linux at arm.linux.org.uk
Thu Jul 17 05:20:00 PDT 2014
On Thu, Jul 17, 2014 at 07:19:15PM +0800, Peter Chen wrote:
> Currently, we are designing a generic driver, we don't know what's the
> hardware architecture, we are trying to find a solution how to set
> dma mask for all possible devices which will use this driver, Antoine's
> this patch is trying to cover this feature.
> For example,
> Marvell Berlin doesn't need to set dma mask specific.
I can't make sense of those messages.
What are you saying - that ci_hdrc on Berlin does not use DMA at all?
Or that it doesn't care what the DMA mask is set to?
> Xilinx zynq needs to set dma mask as 0xFFFFFFF0
Why? The DMA mask does /not/ convey the DMA alignment requirements of
the transfers. If you need it to be aligned to 16-bytes, then that's
something which is internal to the driver. This is no different from
devices which require 32-bit alignment or 64-bit alignment.
You can't really expect the DMA subsystem to take care of that for you.
The DMA mask is about indicating what memory ranges are acceptable for
DMA, and not the alignment.
So, in this case, your DMA mask should be DMA_BIT_MASK(32), the same as
However, if your driver does receive memory which is not appropriately
aligned, it is the driver's responsibility, not the DMA API, to deal
with that appropriately.
So, it sounds to me like:
- The DT code should be setting the DMA mask appropriately already.
- If the driver is using streaming DMA, should call:
err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
- If the driver is using coherent DMA only:
err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
- If the driver uses both coherent DMA and streaming DMA:
err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
Where the _bus_ has restrictions on the available memory (iow, the
higher address bits), these should be dealt with inside the DMA API.
FTTC broadband for 0.8mile line: currently at 9.5Mbps down 400kbps up
according to speedtest.net.
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