[PATCH V2 3/3] clk: exynos-audss: Use samsung clock APIs to register/unregister clocks

[Tushar Behera]

On Mon, Jul 14, 2014 at 9:04 PM, Sylwester Nawrocki
<s.nawrocki at samsung.com> wrote:
> On 11/07/14 14:00, Tushar Behera wrote:
>> @@ -103,17 +140,11 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
>>               return PTR_ERR(reg_base);
>>       }
>>
>> -     clk_table = devm_kzalloc(&pdev->dev,
>> -                             sizeof(struct clk *) * EXYNOS_AUDSS_MAX_CLKS,
>> -                             GFP_KERNEL);
>> -     if (!clk_table)
>> +     ctx = samsung_clk_init(pdev->dev.of_node, reg_base, nr_clks);
>
> There is an issue here that this registers the clk provider before all
> its clocks are registered with the clk core. Therefore it introduces
> a race condition.
>
> Please have a look at patch [1], you may want to rebase this series
> onto that patch.
>

Thanks for the pointer. I will re-post.

>> +     samsung_clk_register_div(ctx, exynos_audss_div_clks,
>> +                             ARRAY_SIZE(exynos_audss_div_clks));
> [...]
>> +     samsung_clk_register_gate(ctx, exynos_audss_gate_clks,
>> +                             ARRAY_SIZE(exynos_audss_gate_clks));
> [...]
>> -     ret = of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get,
>> -                                     &clk_data);
>> -     if (ret) {
>> -             dev_err(&pdev->dev, "failed to add clock provider\n");
>> -             goto unregister;
>> +             samsung_clk_register_gate(ctx, exynos5420_audss_gate_clks,
>> +                                     ARRAY_SIZE(exynos5420_audss_gate_clks));
>>       }
>
> [1]
> https://git.kernel.org/cgit/linux/kernel/git/tfiga/samsung-clk.git/commit/?h=samsung-clk-next&id=d5e136a21b2028fb1f45143ea7112d5869bfc6c7
>
> --
> Regards,
> Sylwester