[PATCH v2 0/4] Fine tune USB 3.0 PHY on exynos5420
gautam.vivek at samsung.com
Wed Jul 9 03:01:32 PDT 2014
This series is based on Heikki's patches for simpliefied phy lookup table:
[PATCHv2 0/6] phy: simplified phy lookup , applied against 'next' branch
of Kishon's linux-phy tree.
Changes since v1:
1) Using 'gen_phy' member of 'hcd' instead of declaring more variables
to hold phys.
2) Added a check for compatible match for 'Synopsys-dwc3' controller,
since the 'gen_phy' member of 'hcd' already gets the 'usb' PHY
in core/hcd.c; but XHCI on Synopsys-dwc3 doesn't need that,
instead two separate PHYs for UTMI+ and PIPE3 for the two HCDs
(main hcd and shared hcd).
3) Restructured the code in 'xhci_plat_setup()' and 'xhci_plat_resume()'
to use hcd->gen_phy directly. Also added the check for Synopsys's DWC3
controller while trying to calibrate the PHY.
Explanation for the need of this patch-series:
"The DWC3-exynos eXtensible host controller present on Exynos5420/5800
SoCs is quirky. The PHY serving this controller operates at High-Speed
by default, so it detects even Super-speed devices as high-speed ones.
Certain PHY parameters like Tx LOS levels and Boost levels need to be
calibrated further post initialization of xHCI controller, to get
SuperSpeed operations working."
Vivek Gautam (4):
phy: Add provision for calibrating phy.
usb: host: xhci-plat: Get PHYs for xhci's hcds
usb: host: xhci-plat: Caibrate PHY post host reset
phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800
drivers/phy/phy-core.c | 36 ++++++++
drivers/phy/phy-exynos5-usbdrd.c | 169 ++++++++++++++++++++++++++++++++++++++
drivers/usb/host/xhci-plat.c | 75 ++++++++++++++++-
include/linux/phy/phy.h | 8 ++
4 files changed, 286 insertions(+), 2 deletions(-)
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