[PATCH v3 2/9] clk: sunxi: Fix gate indexing for sun6i-a31-apb0-gates

Maxime Ripard maxime.ripard at free-electrons.com
Mon Jul 7 01:54:11 PDT 2014

On Thu, Jul 03, 2014 at 10:55:42PM +0800, Chen-Yu Tsai wrote:
> sun6i-a31-apb0-gates supports using clock-indices for holes between
> individual gates. However, the driver passes the number of gates
> registered in clk_data->clk_num, which of_clk_src_onecell_get uses
> to recognize the range of valid indices a consumer can use.
> This patch makes the driver pass the maximum gate index + 1, so
> of_clk_src_onecell_get does not complain about indices greater
> than gates registered.
> This was tested on the A23 SoC, which has a similar APB0 clock,
> but has holes for gates to removed IP blocks.
> Signed-off-by: Chen-Yu Tsai <wens at csie.org>
> Acked-by: Maxime Ripard <maxime.ripard at free-electrons.com>

Applied, thanks!


Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
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