[PATCH v3] arm: remove !CPU_V6 and !GENERIC_ATOMIC64 build dependencies for XEN

[Stefano Stabellini]

On Tue, 21 Jan 2014, Will Deacon wrote:
> On Mon, Jan 20, 2014 at 03:32:48PM +0000, Stefano Stabellini wrote:
> > On Thu, 16 Jan 2014, Will Deacon wrote:
> > > For the xchg part, yes, that looks a lot better. I don't like the #undef
> > > CONFIG_CPU_V6 though, can that be rewritten to use __LINUX_ARM_ARCH__?
> > 
> > The problem is that the 1 and 2 byte parameter size cases in __cmpxchg
> > are ifdef'ed CONFIG_CPU_V6 but drivers/xen/grant-table.c needs them.
> > 
> > So we can either undef CONFIG_CPU_V6 in grant-table.c or call a
> > different function.
> > 
> > If I switch from ifdef CONFIG_CPU_V6 to if __LINUX_ARM_ARCH__ > 6 in
> > __cmpxchg, we still have the problem that if __LINUX_ARM_ARCH__ == 6,
> > grant-table.c doesn't compile.
> > 
> > Maybe the approach taken by the other patch for cmpxchg is better, see
> > below.
> 
> Yes, I prefer this approach. Minor comment below.
> 
> > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > index c1f1a7e..ae54ae0 100644
> > --- a/arch/arm/Kconfig
> > +++ b/arch/arm/Kconfig
> > @@ -1881,8 +1881,7 @@ config XEN_DOM0
> >  config XEN
> >  	bool "Xen guest support on ARM (EXPERIMENTAL)"
> >  	depends on ARM && AEABI && OF
> > -	depends on CPU_V7 && !CPU_V6
> > -	depends on !GENERIC_ATOMIC64
> > +	depends on CPU_V7
> >  	select ARM_PSCI
> >  	select SWIOTLB_XEN
> >  	help
> > diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
> > index df2fbba..cc8a4a2 100644
> > --- a/arch/arm/include/asm/cmpxchg.h
> > +++ b/arch/arm/include/asm/cmpxchg.h
> > @@ -133,6 +133,44 @@ extern void __bad_cmpxchg(volatile void *ptr, int size);
> >   * cmpxchg only support 32-bits operands on ARMv6.
> >   */
> >  
> > +static inline unsigned long __cmpxchg8(volatile void *ptr, unsigned long old,
> > +				      unsigned long new)
> > +{
> > +	unsigned long oldval, res;
> > +
> > +	do {
> > +		asm volatile("@ __cmpxchg1\n"
> > +		"	ldrexb	%1, [%2]\n"
> > +		"	mov	%0, #0\n"
> > +		"	teq	%1, %3\n"
> > +		"	strexbeq %0, %4, [%2]\n"
> > +			: "=&r" (res), "=&r" (oldval)
> > +			: "r" (ptr), "Ir" (old), "r" (new)
> > +			: "memory", "cc");
> > +	} while (res);
> > +
> > +	return oldval;
> > +}
> > +
> > +static inline unsigned long __cmpxchg16(volatile void *ptr, unsigned long old,
> > +				      unsigned long new)
> > +{
> > +	unsigned long oldval, res;
> > +
> > +	do {
> > +		asm volatile("@ __cmpxchg1\n"
> 
> Can you fix this comment while you're here please?

OK, I'll use @ __cmpxchg16 and @ __cmpxchg8.
I'll resend as a separate patch.