[PATCH RESEND] irqchip: sirf: set IRQ_LEVEL status_flags

Olof Johansson olof at lixom.net
Thu Jan 9 01:02:34 EST 2014

On Fri, Jan 03, 2014 at 11:34:46AM +0800, Barry Song wrote:
> SiRF internal interrupts are using level trigger. we need to tell the irq
> core this information. otherwise, we might get some problems as below
> 1. disable_irq(n)
> here irq core will mark the disabled flag but still keep the irq enabled
> due to involved lazy-disable
> 2. doing someting after disable_irq(n)
> in step 2, if one interrupt n comes, irq core will mark it as pending and
> mask the HW interrupt really. we name the coming interrupt as "X".
> 3. enable_irq(n)
> this will unmask the interrupt, so the level-trigger HW interrupt will come
> again, irq_handler will enter as "E1". after that, irq core will also check
> whether irq n is pending, if yes, and pending interrupt is not level-trigger,
> irq core will execute the pending irq_handler.
> so if we don't set the IRQ_LEVEL flag here, irq core will execute pending
> X again as "E2", but actually the pending interrupt has been handled by "E1".
> that makes a level-trigger HW interrupt is executed twice.
> here we fix the issue to avoid redundant interrupt overload.
> Signed-off-by: Barry Song <Baohua.Song at csr.com>
> Signed-off-by: Huayi Li <Huayi.Li at csr.com>

Applied to fixes-non-critical for 3.14.


More information about the linux-arm-kernel mailing list