[PATCH 5/5] ARM: dts: SiRF: add pin group for USP0 with only RX or TX frame sync
Linus Walleij
linus.walleij at linaro.org
Wed Jan 8 04:52:05 EST 2014
On Fri, Jan 3, 2014 at 3:59 AM, Barry Song <21cnbao at gmail.com> wrote:
> From: Rongjun Ying <Rongjun.Ying at csr.com>
>
> add pin groups for USP0 only holding one of TX and RX frame sync. this
> patch matches with the change in drivers/pinctrl/sirf.
>
> Signed-off-by: Rongjun Ying <Rongjun.Ying at csr.com>
> Signed-off-by: Barry Song <Barry.Song at csr.com>
Please carry this patch through ARM SoC or similar Sirf tree.
Yours,
Linus Walleij
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