[RFC] pwm: Add Freescale FTM PWM driver support

[Li.Xiubo at freescale.com]

> That is instead of modifying the low level accessor, you can alter the
> driver masks based on the OF selected endian.  Many of the registers are
> already accessed as run-time fields because each channel is in a
> different bit position.  There are only two registers with fields that
> cross a byte boundary; COUNT and MOD.  These two must be swapped.  The
> others are either a byte or are accessed base on a channel number.
> 
> For example in fsl_pwm_set_polarity(), we would read the memory, swap
> the value, calculate a bit to set, clear or set the bit and then write
> back the swapped value all on the 'big_endian' condition.  This way, you
> just read a bit shift which is conditional on the endian at probe time
> and don't double swap.
> 
> In the fsl_counter_clock_enable(), the example is using 'write ignored
> bits' and duplicating the value in both big/little bytes.  An
> alternative is to parameterize all the mask/values in 'const struct' and
> have a different pointer for big/little and store this in-place (or via
> a pointer) in fsl_pwm_chip.
> 

Bill, I have implemented one version using the method above, and will send
the RFC patch, could you help me review it ?

Thanks,

--
Best Regards,
Xiubo