[PATCH v5 1/5] phy: add a driver for the Rockchip SoC internal USB2.0 PHY
joe at perches.com
Wed Dec 10 22:12:02 PST 2014
On Thu, 2014-12-11 at 11:32 +0530, Kishon Vijay Abraham I wrote:
> On Wednesday 10 December 2014 04:16 PM, Yunzhi Li wrote:
> > diff --git a/drivers/phy/phy-rockchip-usb.c b/drivers/phy/phy-rockchip-usb.c
> > +/*
> > + * The higher 16-bit of this register is used for write protection
> > + * only if BIT(13 + 16) set to 1 the BIT(13) can be written.
> > + */
> > +#define SIDDQ_MSK BIT(13 + 16)
This #define looks _very_ odd.
Is this supposed to be a single bit 29 or
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