[RESEND PATCHv5 5/5] arm: dts: Add Altera L2 Cache and OCRAM EDAC

[Thor Thayer]

On 12/02/2014 09:01 AM, Mark Rutland wrote:
> Hi Thor,
>
> On Mon, Dec 01, 2014 at 08:47:41PM +0000, Thor Thayer wrote:
>> Hi Boris,
>>
>> On 11/18/2014 02:56 PM, Thor Thayer wrote:
>>> Hi all,
>>>
>>> On 11/11/2014 06:14 PM, tthayer at opensource.altera.com wrote:
>>>> From: Thor Thayer<tthayer at opensource.altera.com>
>>>>
>>>> Adding the device tree entries and bindings needed to support
>>>> the Altera L2 cache and On-Chip RAM EDAC. This patch relies upon
>>>> an earlier patch to declare and setup On-chip RAM properly.
>>>> http://www.spinics.net/lists/devicetree/msg51117.html
>>>
>>> Any comments on these devicetree additions?
>>>
>>> Thanks,
>>> Thor
>>>> Signed-off-by: Thor Thayer<tthayer at opensource.altera.com>
>>>> ---
>>>> v2: Remove OCRAM declaration and reference prior patch.
>>>>
>>>> v3-5: No Change
>>>> ---
>>
>> I originally submitted this series on November 11, 2014.
>>
>> I haven't received any comments or ACKs on the device tree patch portion
>> (patch 5 of 5). According to
>> Documentation/devicetree/bindings/submitting-patches.txt, if the patch
>> hasn't been Acked after a couple of weeks, the maintainer can pull the
>> changes if they are comfortable with those changes.
>
> Apologies it has taken so long for this to be looked at. Unfortunately
> my inbox is overflowing (as are all of ours) and things fall by the
> wayside. I am sorry that this has lead to such a delayed response,
> especially given that it was negative.
>
> I'll try to keep up with this a bit more actively.
>
> Thanks,
> Mark.
>

Hi Mark,

Thank you for reviewing this. I have seen how busy the device tree ML is 
so I completely understand.

You have reviewed previous patch revisions in this series - thanks. I 
thought that I'd addressed most of the issues (in some cases by 
explaining my implementation) and since I hadn't heard anything, I 
assumed there weren't concerns.

Thanks again,

Thor