[PATCH v2 06/18] ARM64 / ACPI: Parse MADT to map logical cpu to MPIDR and get cpu_possible/present_map

Hanjun Guo hanjun.guo at linaro.org
Wed Aug 20 19:51:36 PDT 2014

On 2014-8-20 22:38, Catalin Marinas wrote:
> On Tue, Aug 19, 2014 at 08:36:46AM +0100, Hanjun Guo wrote:
>> On 2014-8-18 22:27, Catalin Marinas wrote:
>>> On Mon, Aug 04, 2014 at 04:28:13PM +0100, Hanjun Guo wrote:
>>>> diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
>>>> index 6e04868..e877967 100644
>>>> --- a/arch/arm64/include/asm/acpi.h
>>>> +++ b/arch/arm64/include/asm/acpi.h
>>>> @@ -64,6 +64,8 @@ static inline void arch_fix_phys_package_id(int num, u32 slot) { }
>>>>  extern int (*acpi_suspend_lowlevel)(void);
>>>>  #define acpi_wakeup_address 0
>>>> +#define MAX_GIC_CPU_INTERFACE 65535
>>> Does this need to be more than NR_CPUS?
>> Sometimes yes, CPU structure entries in MADT just like CPU nodes in
>> device tree, the number of them may more than NR_CPUS.
> I have a more general question here. In ACPI, is MADT the only way to
> build a CPU topology? 

Unfortunately yes as far as I can tell.

> It looks weird that we use GIC properties to
> create the cpu_logical_map(). 

Actually information in GICC structures in MADT will both used
for GIC init and SMP init, GICC structures represents CPUs in the

> A side-effect is that the GIC-related
> functions are now scattered all over the kernel rather than being
> contained in the GIC driver itself.

As patch 12/18 shows, all the GIC related code all contained in the
GIC driver, GICC structure is more than GIC-related but also CPUs in the
system (I have to admit that the name of GICC in ACPI is confusing).


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