[PATCH v7 07/11] arm64: mm: Implement 4 levels of translation tables
Catalin Marinas
catalin.marinas at arm.com
Thu Aug 14 05:58:24 PDT 2014
On Thu, Aug 14, 2014 at 12:42:12PM +0100, Ganapatrao Kulkarni wrote:
> IMHO, the Macro MAX_PHYSMEM_BITS needs to be set to 48 in file
> arch/arm64/include/asm/sparsemem.h
>
> with 40 bit set, for RAM address beyond 40 bit, seeeing below warning message.
> WARNING: CPU: 0 PID: 0 at mm/sparse.c:164
> mminit_validate_memmodel_limits+0xf8/0x118()
I agree. Would you mind sending a patch?
Thanks.
--
Catalin
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