[PATCH v2 2/3] arm64: add helper functions to read I-cache attributes

[Ard Biesheuvel]

On 6 August 2014 15:00, Will Deacon <will.deacon at arm.com> wrote:
> On Tue, Aug 05, 2014 at 10:25:56AM +0100, Ard Biesheuvel wrote:
>> This adds helper functions and #defines to <asm/cachetype.h> to read the
>> line size and the number of sets from the level 1 instruction cache.
>>
>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel at linaro.org>
>> ---
>> v2: put () around macro args, use 64-bit types for asm() mrs/msr calls
>>
>>  arch/arm64/include/asm/cachetype.h | 28 ++++++++++++++++++++++++++++
>>  1 file changed, 28 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/cachetype.h b/arch/arm64/include/asm/cachetype.h
>> index 7a2e0762cb40..e59c0c25b307 100644
>> --- a/arch/arm64/include/asm/cachetype.h
>> +++ b/arch/arm64/include/asm/cachetype.h
>> @@ -39,6 +39,34 @@
>>
>>  extern unsigned long __icache_flags;
>>
>> +#define CCSIDR_EL1_LINESIZE_MASK     0x7
>> +#define CCSIDR_EL1_LINESIZE(x)               ((x) & CCSIDR_EL1_LINESIZE_MASK)
>> +
>> +#define CCSIDR_EL1_NUMSETS_SHIFT     13
>> +#define CCSIDR_EL1_NUMSETS_MASK              (0x7fff << CCSIDR_EL1_NUMSETS_SHIFT)
>> +#define CCSIDR_EL1_NUMSETS(x) \
>> +     (((x) & CCSIDR_EL1_NUMSETS_MASK) >> CCSIDR_EL1_NUMSETS_SHIFT)
>> +
>> +static inline __attribute_const__ u64 icache_get_ccsidr(void)
>> +{
>> +     u64 ccsidr;
>> +
>> +     /* Select L1 I-cache and read its size ID register */
>> +     asm("msr csselr_el1, %1; isb; mrs %0, ccsidr_el1"
>> +         : "=r"(ccsidr) : "r"(1L));
>> +     return ccsidr;
>
> Is it worth having a WARN_ON(preemptible()) here?
>

Sure, why not.