[PATCH 1/2] ARM: LPAE: load upper bits of early TTBR0/TTBR1
Konstantin Khlebnikov
koct9i at gmail.com
Tue Aug 5 08:42:32 PDT 2014
On Tue, Jul 22, 2014 at 7:36 PM, Konstantin Khlebnikov
<k.khlebnikov at samsung.com> wrote:
> This patch fixes booting when idmap pgd lays above 4gb. Commit
> 4756dcbfd37 mostly had fixed this, but it'd failed to load upper bits.
>
> Also this fixes adding TTBR1_OFFSET to TTRR1: if lower part overflows
> carry flag must be added to the upper part.
>
> Signed-off-by: Konstantin Khlebnikov <k.khlebnikov at samsung.com>
> Cc: Cyril Chemparathy <cyril at ti.com>
> Cc: Vitaly Andrianov <vitalya at ti.com>
> ---
> arch/arm/mm/proc-v7-3level.S | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
> index 22e3ad6..f0481dd 100644
> --- a/arch/arm/mm/proc-v7-3level.S
> +++ b/arch/arm/mm/proc-v7-3level.S
> @@ -140,12 +140,11 @@ ENDPROC(cpu_v7_set_pte_ext)
> mov \tmp, \ttbr1, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
> mov \ttbr1, \ttbr1, lsl #ARCH_PGD_SHIFT @ lower bits
> addls \ttbr1, \ttbr1, #TTBR1_OFFSET
> - mcrr p15, 1, \ttbr1, \zero, c2 @ load TTBR1
> + adcls \tmp, \tmp, #0
Oops, this carry fixup is wrong. addls above doesn't set carry flag.
> + mcrr p15, 1, \ttbr1, \tmp, c2 @ load TTBR1
> mov \tmp, \ttbr0, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
> mov \ttbr0, \ttbr0, lsl #ARCH_PGD_SHIFT @ lower bits
> - mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0
> - mcrr p15, 1, \ttbr1, \zero, c2 @ load TTBR1
> - mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0
> + mcrr p15, 0, \ttbr0, \tmp, c2 @ load TTBR0
> .endm
>
> /*
>
> --
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