[PATCH v2 0/5] ARM: vexpress/TC2: cpufreq support
Viresh Kumar
viresh.kumar at linaro.org
Tue Oct 22 04:22:13 EDT 2013
On 21 October 2013 15:28, Sudeep KarkadaNagesha
<Sudeep.KarkadaNagesha at arm.com> wrote:
> From: Sudeep KarkadaNagesha <sudeep.karkadanagesha at arm.com>
>
> Hi,
>
> The SPC(Serial Power Controller) on Versatile Express V2P-CA15_A7(TC2)
> not only controls low-power states, wake-up irqs and per-CPU jump addresses
> but also the CPU performance operating points which is essential to provide
> CPU DVFS. The M3 microcontroller can provide upto eight performance values,
> one set for each cluster (CA15 or CA7). Each of this value contains the
> frequency(kHz) and voltage(mV) at that performance level. It expects
> these performance level to be passed through the SPC PERF_LVL registers.
>
> This patch series adds support to populate those OPPs, add them to the
> cpu devices and runtime programming of these performance levels through
> clock framework. It also adds a small interface cpufreq driver to validate
> the OPPs and register the arm_big_little cpufreq driver.
>
> Changes v1->v2:
> - Introduced ARCH_VEXPRESS_SPC config to make dependency
> selection cleaner
> - Other minor review comments from Nico implemented
>
> Regards,
> Sudeep
>
> Sudeep KarkadaNagesha (5):
> cpufreq: arm-big-little: use clk_get instead of clk_get_sys
> ARM: vexpress/TC2: add support for CPU DVFS
> ARM: vexpress/TC2: add cpu clock support
> cpufreq: arm_big_little: add vexpress SPC interface driver
> ARM: vexpress/TC2: register vexpress-spc cpufreq device
For All Patches:
Acked-by: Viresh Kumar <viresh.kumar at linaro.org>
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