[PATCH 3/3] KVM: ARM: Add support for Cortex-A7

[Gavin Guo]

On Mon, Oct 7, 2013 at 4:07 PM, Marc Zyngier <marc.zyngier at arm.com> wrote:
>
> On 07/10/13 07:16, Gavin Guo wrote:
> > On Sun, Oct 6, 2013 at 10:56 PM, Peter Maydell <peter.maydell at linaro.org
> > <mailto:peter.maydell at linaro.org>> wrote:
> >
> >     On 6 October 2013 23:03, Gavin Guo <gavin.guo at canonical.com
> >     <mailto:gavin.guo at canonical.com>> wrote:
> >     > Does it mean the currently qemu can't support A15 vcpu running on
> >     host A7?
> >
> >     No, that's a kernel restriction. That is why the patch description
> >     reads:
> >     # This patch adds support for running Cortex-A7 guests on Cortex-A7
> >     hosts.
> >
> >     (What QEMU is currently missing is A7 support, so you can't ask it to
> >     run an A7 guest CPU.)
> >
> >     -- PMM
> >
> >
> > Thanks, I saw the checking in the kvm_vcpu_set_target(). I'm confused
> > that what is the concern to run the same cpu type? Does it matter to run
> > A15 on A7 or inverse?
>
> It does. MIDR registers are different. Cache size is different. It may
> work, or it may not. And at the very least, you should present a
> consistent view of the underlying system to the unsuspecting OS.
>
>         M.
> --
> Jazz is not dead. It just smells funny...
>

Hi Marc,

How about the guest os with 4 x A15 vcpus run on a TC2 with 5 cores
enabled (2 x A15 + 3 x A7). Does it mean that the 4 x A15 vcpus need
to run on the 2 x A15 real cpus and can't be migrate to the 3 x A7? It
seems that running 4 x A15 vcpus on the 2 x A15 and 2 x A7 core and
leaving 1 A7 idle can take more computing power if all of the 4 x A15
guest os vcpus are full of loading. BTW, thanks for your reply,
according to your reply I know the MIDR and cache size are different.
Furthermore, I'd like to know if it is possible to make vcpu and real
cpu in different type? If yes, I would like to study how to modify to
make it work.

Thanks,
Gavin