[PATCH v2 05/12] ARM: barrier: allow options to be passed to memory barrier instructions

[Will Deacon]

Hello,

On Fri, Jun 21, 2013 at 09:37:14AM +0100, Ming Lei wrote:
> On Thu, Jun 20, 2013 at 10:21 PM, Will Deacon <will.deacon at arm.com> wrote:
> > On ARMv7, the memory barrier instructions take an optional `option'
> > field which can be used to constrain the effects of a memory barrier
> > based on shareability and access type.
> >
> > This patch allows the caller to pass these options if required, and
> > updates the smp_*() barriers to request inner-shareable barriers,
> > affecting only stores for the _wmb variant. wmb() is also changed to
> > use the -st version of dsb.
> >
> > Reported-by: Albin Tonnerre <albin.tonnerre at arm.com>
> > Reviewed-by: Catalin Marinas <catalin.marinas at arm.com>
> > Signed-off-by: Will Deacon <will.deacon at arm.com>
> > ---
> >  arch/arm/include/asm/assembler.h |  4 ++--
> >  arch/arm/include/asm/barrier.h   | 32 ++++++++++++++++----------------
> >  2 files changed, 18 insertions(+), 18 deletions(-)

[...]
> > @@ -42,7 +42,7 @@
> >  #elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
> >  #define mb()           do { dsb(); outer_sync(); } while (0)
> >  #define rmb()          dsb()
> 
> The above two dsb() are missed?

I don't think so. What would you suggest changing them to? Remember: there's
no `load' barrier variant in ARMv7, and the non smp_ barriers may be used to
ensure ordering outside of the inner-shareable domain (for example, in I/O
accessors).

Will