[Linaro-mm-sig] [RFC 3/3] iommu/tegra: smmu: Support read-only mapping

Hiroshi Doyu hdoyu at nvidia.com
Thu Jun 20 03:27:17 EDT 2013


Hi Kyungmin,

Kyungmin Park <kmpark at infradead.org> wrote @ Thu, 20 Jun 2013 08:50:14 +0200:

> On Thu, Jun 20, 2013 at 2:49 PM, Hiroshi Doyu <hdoyu at nvidia.com> wrote:
> > Support read-only mapping via struct dma_attrs.
> >
> > Signed-off-by: Hiroshi Doyu <hdoyu at nvidia.com>
> > ---
> >  drivers/iommu/tegra-smmu.c | 41 +++++++++++++++++++++++++++++------------
> >  1 file changed, 29 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
> > index fab1f19..3aff4cd 100644
> > --- a/drivers/iommu/tegra-smmu.c
> > +++ b/drivers/iommu/tegra-smmu.c
> > @@ -862,12 +862,13 @@ static size_t __smmu_iommu_unmap_largepage(struct smmu_as *as, dma_addr_t iova)
> >  }
> >
> >  static int __smmu_iommu_map_pfn(struct smmu_as *as, dma_addr_t iova,
> > -                                unsigned long pfn)
> > +                               unsigned long pfn, int prot)
> Can you find 'prot' is used at other arch? In previous patch, you cast

{amd,intel}_iommu_map() take the IOMMU standard flags below and
translate it into each H/W dependent bits.

#define IOMMU_READ	(1)
#define IOMMU_WRITE	(2)
#define IOMMU_CACHE	(4) /* DMA cache coherency */

The others like OMAP/MSM pass their H/W dependent bits all the way. I
think that they don't use IOMMU via DMA mapping API.

> it as 'int' but below code cast it as 'struct dma_attr' again.
> doesn't it better to use 'struct dma_attr' as parameter to avoid
> double cast? Of course you have to modify existing APIs to use 'struct
> dma_attr'.

If DMA mapping API is considered as the standard frontend of
IOMMU(API), that may be an option.



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