[PATCH v2] ARM: errata: LoUIS bit field in CLIDR register is incorrect
Nicolas Pitre
nicolas.pitre at linaro.org
Thu Jun 6 13:41:05 EDT 2013
On Thu, 6 Jun 2013, Nicolas Pitre wrote:
> On Thu, 6 Jun 2013, Jon Medhurst (Tixy) wrote:
>
> > On Cortex-A9 before version r1p0, the LoUIS bit field of the CLIDR
> > register returns zero when it should return one. This leads to cache
> > maintenance operations which rely on this value to not function as
> > intended, causing data corruption.
> >
> > The workaround for this errata is to detect affected CPUs and correct
> > the LoUIS value read.
> >
> > Acked-by: Will Deacon <will.deacon at arm.com>
> > Signed-off-by: Jon Medhurst <tixy at linaro.org>
>
> Acked-by: Nicolas Pitre <nico at linaro.org>
>
> This wouldn't hurt adding 'CC: stable at kernel.org' as well.
"stable at vger.kernel.org" that is.
Nicolas
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