[PATCH 3/3] ARM PJ4B: Add support for errata 4611

Lior Amsalem alior at marvell.com
Tue Jun 4 07:34:53 EDT 2013


> From: Arnd Bergmann [mailto:arnd at arndb.de]
> Sent: Wednesday, May 29, 2013 4:33 PM
> 
> On Wednesday 29 May 2013 15:27:31 Gregory CLEMENT wrote:
> > OK I will see what kind of information I can gather and which ones I
> > can add to the Documentation/arm/Marvell/README file.
> >
> > My current understanding is that there are at least 3 kind of CPU:
> > PJ4, PJ4B and PJ4B-MP and all of them belongs to the Sheeva family.
> 
> Ok. So I guess PJ4B adds LPAE support, and PJ4B-MP adds SMP support,
> right? Do either of them support hypervisor mode?

It goes like this:
PJ4B: improved version of PJ4.
PJ4B-MP: adds LPAE and SMP.
No support for virtualization on any.

> 
> Regarding the errata: are those needed for production-level chips, or just for
> prototypes?

These are production level chips.

> 
> 	Arnd

Regards,
Lior Amsalem




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