[PATCH RFC 3/8] clk: sunxi: add gating support to PLL1

Maxime Ripard maxime.ripard at free-electrons.com
Tue Jul 23 09:15:24 EDT 2013

On Mon, Jul 22, 2013 at 10:01:07PM -0300, Emilio López wrote:
> This commit adds gating support to PLL1 on the clock driver. This makes
> the PLL1 implementation fully compatible with PLL4 as well.
> Signed-off-by: Emilio López <emilio at elopez.com.ar>

Acked-by: Maxime Ripard <maxime.ripard at free-electrons.com>

Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
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