[PATCH] ARM: shmobile: r8a7790 SMP prototype v2
Magnus Damm
magnus.damm at gmail.com
Mon Jul 8 21:29:14 EDT 2013
On Tue, Jul 9, 2013 at 8:21 AM, Arnd Bergmann <arnd at arndb.de> wrote:
> On Monday 08 July 2013, Magnus Damm wrote:
>> >> +static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
>> >> +{
>> >> + void __iomem *p;
>> >> + unsigned int k;
>> >> +
>> >> + shmobile_boot_fn = virt_to_phys(shmobile_invalidate_start);
>> >> +
>> >> + /* MERAM for jump stub, because BAR requires 256KB aligned address */
>> >> + p = ioremap_nocache(MERAM, 16);
>> >> + memcpy(p, shmobile_boot_vector, 16);
>> >> + iounmap(p);
>> >
>> > On the other hand here you have to use __raw_writel() or
>> > memcpy_toio() because memcpy cannot operate on __iomem tokens.
>> >
>> > Also, if this is actually memory, you probably want to use ioremap_cached
>> > or ioremap_writecombine.
>>
>> Yeah, I realize this may be a bit of a mess. So say that I used
>> ioremap_cached() here, I think I still need to flush the cache to make
>> sure the secondary processors have valid code available then they
>> boot. I suppose you're fine with that?
>
> Is that required to get the data from dcache to icache? If so, that
> sounds right.
Good point. I sort of assumed that the secondary CPU cores booted with
cache disabled, but I may be wrong.
Thanks,
/ magnus
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