[PATCH v3 4/6] ARM: dts: imx6q{dl}: fix the wrong RTS/CTS pad name
Huang Shijie
b32955 at freescale.com
Fri Jul 5 02:12:30 EDT 2013
There is something wrong with the RTS/CTS pads:
The RTS pad is assigned with the CTS's value;
while the CTS pad is assigned with the RTS's value.
In order to fix it, this patch exchanges the RTS/CTS pad name.
Signed-off-by: Huang Shijie <b32955 at freescale.com>
---
arch/arm/boot/dts/imx6dl-pinfunc.h | 88 ++++++++++++++++++------------------
arch/arm/boot/dts/imx6q-pinfunc.h | 88 ++++++++++++++++++------------------
2 files changed, 88 insertions(+), 88 deletions(-)
diff --git a/arch/arm/boot/dts/imx6dl-pinfunc.h b/arch/arm/boot/dts/imx6dl-pinfunc.h
index 9aab950..4840a73 100644
--- a/arch/arm/boot/dts/imx6dl-pinfunc.h
+++ b/arch/arm/boot/dts/imx6dl-pinfunc.h
@@ -54,26 +54,26 @@
#define MX6DL_PAD_CSI0_DAT15__ARM_TRACE12 0x060 0x374 0x000 0x7 0x0
#define MX6DL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x064 0x378 0x000 0x0 0x0
#define MX6DL_PAD_CSI0_DAT16__EIM_DATA12 0x064 0x378 0x000 0x1 0x0
-#define MX6DL_PAD_CSI0_DAT16__UART4_RTS_B 0x064 0x378 0x910 0x3 0x0
-#define MX6DL_PAD_CSI0_DAT16__UART4_CTS_B 0x064 0x378 0x000 0x3 0x0
+#define MX6DL_PAD_CSI0_DAT16__UART4_CTS_B 0x064 0x378 0x910 0x3 0x0
+#define MX6DL_PAD_CSI0_DAT16__UART4_RTS_B 0x064 0x378 0x000 0x3 0x0
#define MX6DL_PAD_CSI0_DAT16__GPIO6_IO02 0x064 0x378 0x000 0x5 0x0
#define MX6DL_PAD_CSI0_DAT16__ARM_TRACE13 0x064 0x378 0x000 0x7 0x0
#define MX6DL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x068 0x37c 0x000 0x0 0x0
#define MX6DL_PAD_CSI0_DAT17__EIM_DATA13 0x068 0x37c 0x000 0x1 0x0
-#define MX6DL_PAD_CSI0_DAT17__UART4_CTS_B 0x068 0x37c 0x000 0x3 0x0
-#define MX6DL_PAD_CSI0_DAT17__UART4_RTS_B 0x068 0x37c 0x910 0x3 0x1
+#define MX6DL_PAD_CSI0_DAT17__UART4_RTS_B 0x068 0x37c 0x000 0x3 0x0
+#define MX6DL_PAD_CSI0_DAT17__UART4_CTS_B 0x068 0x37c 0x910 0x3 0x1
#define MX6DL_PAD_CSI0_DAT17__GPIO6_IO03 0x068 0x37c 0x000 0x5 0x0
#define MX6DL_PAD_CSI0_DAT17__ARM_TRACE14 0x068 0x37c 0x000 0x7 0x0
#define MX6DL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x06c 0x380 0x000 0x0 0x0
#define MX6DL_PAD_CSI0_DAT18__EIM_DATA14 0x06c 0x380 0x000 0x1 0x0
-#define MX6DL_PAD_CSI0_DAT18__UART5_RTS_B 0x06c 0x380 0x918 0x3 0x0
-#define MX6DL_PAD_CSI0_DAT18__UART5_CTS_B 0x06c 0x380 0x000 0x3 0x0
+#define MX6DL_PAD_CSI0_DAT18__UART5_CTS_B 0x06c 0x380 0x918 0x3 0x0
+#define MX6DL_PAD_CSI0_DAT18__UART5_RTS_B 0x06c 0x380 0x000 0x3 0x0
#define MX6DL_PAD_CSI0_DAT18__GPIO6_IO04 0x06c 0x380 0x000 0x5 0x0
#define MX6DL_PAD_CSI0_DAT18__ARM_TRACE15 0x06c 0x380 0x000 0x7 0x0
#define MX6DL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x070 0x384 0x000 0x0 0x0
#define MX6DL_PAD_CSI0_DAT19__EIM_DATA15 0x070 0x384 0x000 0x1 0x0
-#define MX6DL_PAD_CSI0_DAT19__UART5_CTS_B 0x070 0x384 0x000 0x3 0x0
-#define MX6DL_PAD_CSI0_DAT19__UART5_RTS_B 0x070 0x384 0x918 0x3 0x1
+#define MX6DL_PAD_CSI0_DAT19__UART5_RTS_B 0x070 0x384 0x000 0x3 0x0
+#define MX6DL_PAD_CSI0_DAT19__UART5_CTS_B 0x070 0x384 0x918 0x3 0x1
#define MX6DL_PAD_CSI0_DAT19__GPIO6_IO05 0x070 0x384 0x000 0x5 0x0
#define MX6DL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x074 0x388 0x000 0x0 0x0
#define MX6DL_PAD_CSI0_DAT4__EIM_DATA02 0x074 0x388 0x000 0x1 0x0
@@ -376,8 +376,8 @@
#define MX6DL_PAD_EIM_D19__ECSPI1_SS1 0x150 0x520 0x7e8 0x1 0x1
#define MX6DL_PAD_EIM_D19__IPU1_DI0_PIN08 0x150 0x520 0x000 0x2 0x0
#define MX6DL_PAD_EIM_D19__IPU1_CSI1_DATA16 0x150 0x520 0x8a0 0x3 0x1
-#define MX6DL_PAD_EIM_D19__UART1_CTS_B 0x150 0x520 0x000 0x4 0x0
-#define MX6DL_PAD_EIM_D19__UART1_RTS_B 0x150 0x520 0x8f8 0x4 0x0
+#define MX6DL_PAD_EIM_D19__UART1_RTS_B 0x150 0x520 0x000 0x4 0x0
+#define MX6DL_PAD_EIM_D19__UART1_CTS_B 0x150 0x520 0x8f8 0x4 0x0
#define MX6DL_PAD_EIM_D19__GPIO3_IO19 0x150 0x520 0x000 0x5 0x0
#define MX6DL_PAD_EIM_D19__EPIT1_OUT 0x150 0x520 0x000 0x6 0x0
#define MX6DL_PAD_EIM_D19__EPDC_DATA12 0x150 0x520 0x000 0x8 0x0
@@ -385,8 +385,8 @@
#define MX6DL_PAD_EIM_D20__ECSPI4_SS0 0x154 0x524 0x808 0x1 0x0
#define MX6DL_PAD_EIM_D20__IPU1_DI0_PIN16 0x154 0x524 0x000 0x2 0x0
#define MX6DL_PAD_EIM_D20__IPU1_CSI1_DATA15 0x154 0x524 0x89c 0x3 0x1
-#define MX6DL_PAD_EIM_D20__UART1_RTS_B 0x154 0x524 0x8f8 0x4 0x1
-#define MX6DL_PAD_EIM_D20__UART1_CTS_B 0x154 0x524 0x000 0x4 0x0
+#define MX6DL_PAD_EIM_D20__UART1_CTS_B 0x154 0x524 0x8f8 0x4 0x1
+#define MX6DL_PAD_EIM_D20__UART1_RTS_B 0x154 0x524 0x000 0x4 0x0
#define MX6DL_PAD_EIM_D20__GPIO3_IO20 0x154 0x524 0x000 0x5 0x0
#define MX6DL_PAD_EIM_D20__EPIT2_OUT 0x154 0x524 0x000 0x6 0x0
#define MX6DL_PAD_EIM_D21__EIM_DATA21 0x158 0x528 0x000 0x0 0x0
@@ -407,8 +407,8 @@
#define MX6DL_PAD_EIM_D22__EPDC_SDCE6 0x15c 0x52c 0x000 0x8 0x0
#define MX6DL_PAD_EIM_D23__EIM_DATA23 0x160 0x530 0x000 0x0 0x0
#define MX6DL_PAD_EIM_D23__IPU1_DI0_D0_CS 0x160 0x530 0x000 0x1 0x0
-#define MX6DL_PAD_EIM_D23__UART3_CTS_B 0x160 0x530 0x000 0x2 0x0
-#define MX6DL_PAD_EIM_D23__UART3_RTS_B 0x160 0x530 0x908 0x2 0x0
+#define MX6DL_PAD_EIM_D23__UART3_RTS_B 0x160 0x530 0x000 0x2 0x0
+#define MX6DL_PAD_EIM_D23__UART3_CTS_B 0x160 0x530 0x908 0x2 0x0
#define MX6DL_PAD_EIM_D23__UART1_DCD_B 0x160 0x530 0x000 0x3 0x0
#define MX6DL_PAD_EIM_D23__IPU1_CSI1_DATA_EN 0x160 0x530 0x8b0 0x4 0x0
#define MX6DL_PAD_EIM_D23__GPIO3_IO23 0x160 0x530 0x000 0x5 0x0
@@ -459,8 +459,8 @@
#define MX6DL_PAD_EIM_D28__I2C1_SDA 0x174 0x544 0x86c 0x1 0x1
#define MX6DL_PAD_EIM_D28__ECSPI4_MOSI 0x174 0x544 0x000 0x2 0x0
#define MX6DL_PAD_EIM_D28__IPU1_CSI1_DATA12 0x174 0x544 0x890 0x3 0x1
-#define MX6DL_PAD_EIM_D28__UART2_CTS_B 0x174 0x544 0x000 0x4 0x0
-#define MX6DL_PAD_EIM_D28__UART2_RTS_B 0x174 0x544 0x900 0x4 0x0
+#define MX6DL_PAD_EIM_D28__UART2_RTS_B 0x174 0x544 0x000 0x4 0x0
+#define MX6DL_PAD_EIM_D28__UART2_CTS_B 0x174 0x544 0x900 0x4 0x0
#define MX6DL_PAD_EIM_D28__GPIO3_IO28 0x174 0x544 0x000 0x5 0x0
#define MX6DL_PAD_EIM_D28__IPU1_EXT_TRIG 0x174 0x544 0x000 0x6 0x0
#define MX6DL_PAD_EIM_D28__IPU1_DI0_PIN13 0x174 0x544 0x000 0x7 0x0
@@ -468,8 +468,8 @@
#define MX6DL_PAD_EIM_D29__EIM_DATA29 0x178 0x548 0x000 0x0 0x0
#define MX6DL_PAD_EIM_D29__IPU1_DI1_PIN15 0x178 0x548 0x000 0x1 0x0
#define MX6DL_PAD_EIM_D29__ECSPI4_SS0 0x178 0x548 0x808 0x2 0x1
-#define MX6DL_PAD_EIM_D29__UART2_RTS_B 0x178 0x548 0x900 0x4 0x1
-#define MX6DL_PAD_EIM_D29__UART2_CTS_B 0x178 0x548 0x000 0x4 0x0
+#define MX6DL_PAD_EIM_D29__UART2_CTS_B 0x178 0x548 0x900 0x4 0x1
+#define MX6DL_PAD_EIM_D29__UART2_RTS_B 0x178 0x548 0x000 0x4 0x0
#define MX6DL_PAD_EIM_D29__GPIO3_IO29 0x178 0x548 0x000 0x5 0x0
#define MX6DL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0x178 0x548 0x8bc 0x6 0x0
#define MX6DL_PAD_EIM_D29__IPU1_DI0_PIN14 0x178 0x548 0x000 0x7 0x0
@@ -478,8 +478,8 @@
#define MX6DL_PAD_EIM_D30__IPU1_DISP1_DATA21 0x17c 0x54c 0x000 0x1 0x0
#define MX6DL_PAD_EIM_D30__IPU1_DI0_PIN11 0x17c 0x54c 0x000 0x2 0x0
#define MX6DL_PAD_EIM_D30__IPU1_CSI0_DATA03 0x17c 0x54c 0x000 0x3 0x0
-#define MX6DL_PAD_EIM_D30__UART3_CTS_B 0x17c 0x54c 0x000 0x4 0x0
-#define MX6DL_PAD_EIM_D30__UART3_RTS_B 0x17c 0x54c 0x908 0x4 0x1
+#define MX6DL_PAD_EIM_D30__UART3_RTS_B 0x17c 0x54c 0x000 0x4 0x0
+#define MX6DL_PAD_EIM_D30__UART3_CTS_B 0x17c 0x54c 0x908 0x4 0x1
#define MX6DL_PAD_EIM_D30__GPIO3_IO30 0x17c 0x54c 0x000 0x5 0x0
#define MX6DL_PAD_EIM_D30__USB_H1_OC 0x17c 0x54c 0x924 0x6 0x0
#define MX6DL_PAD_EIM_D30__EPDC_SDOEZ 0x17c 0x54c 0x000 0x8 0x0
@@ -487,8 +487,8 @@
#define MX6DL_PAD_EIM_D31__IPU1_DISP1_DATA20 0x180 0x550 0x000 0x1 0x0
#define MX6DL_PAD_EIM_D31__IPU1_DI0_PIN12 0x180 0x550 0x000 0x2 0x0
#define MX6DL_PAD_EIM_D31__IPU1_CSI0_DATA02 0x180 0x550 0x000 0x3 0x0
-#define MX6DL_PAD_EIM_D31__UART3_RTS_B 0x180 0x550 0x908 0x4 0x2
-#define MX6DL_PAD_EIM_D31__UART3_CTS_B 0x180 0x550 0x000 0x4 0x0
+#define MX6DL_PAD_EIM_D31__UART3_CTS_B 0x180 0x550 0x908 0x4 0x2
+#define MX6DL_PAD_EIM_D31__UART3_RTS_B 0x180 0x550 0x000 0x4 0x0
#define MX6DL_PAD_EIM_D31__GPIO3_IO31 0x180 0x550 0x000 0x5 0x0
#define MX6DL_PAD_EIM_D31__USB_H1_PWR 0x180 0x550 0x000 0x6 0x0
#define MX6DL_PAD_EIM_D31__EPDC_SDCLK_P 0x180 0x550 0x000 0x8 0x0
@@ -610,8 +610,8 @@
#define MX6DL_PAD_EIM_EB2__EPDC_DATA05 0x1cc 0x59c 0x000 0x8 0x0
#define MX6DL_PAD_EIM_EB3__EIM_EB3_B 0x1d0 0x5a0 0x000 0x0 0x0
#define MX6DL_PAD_EIM_EB3__ECSPI4_RDY 0x1d0 0x5a0 0x000 0x1 0x0
-#define MX6DL_PAD_EIM_EB3__UART3_RTS_B 0x1d0 0x5a0 0x908 0x2 0x3
-#define MX6DL_PAD_EIM_EB3__UART3_CTS_B 0x1d0 0x5a0 0x000 0x2 0x0
+#define MX6DL_PAD_EIM_EB3__UART3_CTS_B 0x1d0 0x5a0 0x908 0x2 0x3
+#define MX6DL_PAD_EIM_EB3__UART3_RTS_B 0x1d0 0x5a0 0x000 0x2 0x0
#define MX6DL_PAD_EIM_EB3__UART1_RI_B 0x1d0 0x5a0 0x000 0x3 0x0
#define MX6DL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0x1d0 0x5a0 0x8b4 0x4 0x1
#define MX6DL_PAD_EIM_EB3__GPIO2_IO31 0x1d0 0x5a0 0x000 0x5 0x0
@@ -815,8 +815,8 @@
#define MX6DL_PAD_KEY_COL4__IPU1_SISG4 0x254 0x63c 0x000 0x1 0x0
#define MX6DL_PAD_KEY_COL4__USB_OTG_OC 0x254 0x63c 0x920 0x2 0x1
#define MX6DL_PAD_KEY_COL4__KEY_COL4 0x254 0x63c 0x000 0x3 0x0
-#define MX6DL_PAD_KEY_COL4__UART5_RTS_B 0x254 0x63c 0x918 0x4 0x2
-#define MX6DL_PAD_KEY_COL4__UART5_CTS_B 0x254 0x63c 0x000 0x4 0x0
+#define MX6DL_PAD_KEY_COL4__UART5_CTS_B 0x254 0x63c 0x918 0x4 0x2
+#define MX6DL_PAD_KEY_COL4__UART5_RTS_B 0x254 0x63c 0x000 0x4 0x0
#define MX6DL_PAD_KEY_COL4__GPIO4_IO14 0x254 0x63c 0x000 0x5 0x0
#define MX6DL_PAD_KEY_ROW0__ECSPI1_MOSI 0x258 0x640 0x7e0 0x0 0x3
#define MX6DL_PAD_KEY_ROW0__ENET_TX_DATA3 0x258 0x640 0x000 0x1 0x0
@@ -851,8 +851,8 @@
#define MX6DL_PAD_KEY_ROW4__IPU1_SISG5 0x268 0x650 0x000 0x1 0x0
#define MX6DL_PAD_KEY_ROW4__USB_OTG_PWR 0x268 0x650 0x000 0x2 0x0
#define MX6DL_PAD_KEY_ROW4__KEY_ROW4 0x268 0x650 0x000 0x3 0x0
-#define MX6DL_PAD_KEY_ROW4__UART5_CTS_B 0x268 0x650 0x000 0x4 0x0
-#define MX6DL_PAD_KEY_ROW4__UART5_RTS_B 0x268 0x650 0x918 0x4 0x3
+#define MX6DL_PAD_KEY_ROW4__UART5_RTS_B 0x268 0x650 0x000 0x4 0x0
+#define MX6DL_PAD_KEY_ROW4__UART5_CTS_B 0x268 0x650 0x918 0x4 0x3
#define MX6DL_PAD_KEY_ROW4__GPIO4_IO15 0x268 0x650 0x000 0x5 0x0
#define MX6DL_PAD_NANDF_ALE__NAND_ALE 0x26c 0x654 0x000 0x0 0x0
#define MX6DL_PAD_NANDF_ALE__SD4_RESET 0x26c 0x654 0x000 0x1 0x0
@@ -999,30 +999,30 @@
#define MX6DL_PAD_SD2_DAT3__AUD4_TXC 0x308 0x6f0 0x7a8 0x3 0x1
#define MX6DL_PAD_SD2_DAT3__GPIO1_IO12 0x308 0x6f0 0x000 0x5 0x0
#define MX6DL_PAD_SD3_CLK__SD3_CLK 0x30c 0x6f4 0x934 0x0 0x1
-#define MX6DL_PAD_SD3_CLK__UART2_RTS_B 0x30c 0x6f4 0x900 0x1 0x2
-#define MX6DL_PAD_SD3_CLK__UART2_CTS_B 0x30c 0x6f4 0x000 0x1 0x0
+#define MX6DL_PAD_SD3_CLK__UART2_CTS_B 0x30c 0x6f4 0x900 0x1 0x2
+#define MX6DL_PAD_SD3_CLK__UART2_RTS_B 0x30c 0x6f4 0x000 0x1 0x0
#define MX6DL_PAD_SD3_CLK__FLEXCAN1_RX 0x30c 0x6f4 0x7c8 0x2 0x2
#define MX6DL_PAD_SD3_CLK__GPIO7_IO03 0x30c 0x6f4 0x000 0x5 0x0
#define MX6DL_PAD_SD3_CMD__SD3_CMD 0x310 0x6f8 0x000 0x0 0x0
-#define MX6DL_PAD_SD3_CMD__UART2_CTS_B 0x310 0x6f8 0x000 0x1 0x0
-#define MX6DL_PAD_SD3_CMD__UART2_RTS_B 0x310 0x6f8 0x900 0x1 0x3
+#define MX6DL_PAD_SD3_CMD__UART2_RTS_B 0x310 0x6f8 0x000 0x1 0x0
+#define MX6DL_PAD_SD3_CMD__UART2_CTS_B 0x310 0x6f8 0x900 0x1 0x3
#define MX6DL_PAD_SD3_CMD__FLEXCAN1_TX 0x310 0x6f8 0x000 0x2 0x0
#define MX6DL_PAD_SD3_CMD__GPIO7_IO02 0x310 0x6f8 0x000 0x5 0x0
#define MX6DL_PAD_SD3_DAT0__SD3_DATA0 0x314 0x6fc 0x000 0x0 0x0
-#define MX6DL_PAD_SD3_DAT0__UART1_CTS_B 0x314 0x6fc 0x000 0x1 0x0
-#define MX6DL_PAD_SD3_DAT0__UART1_RTS_B 0x314 0x6fc 0x8f8 0x1 0x2
+#define MX6DL_PAD_SD3_DAT0__UART1_RTS_B 0x314 0x6fc 0x000 0x1 0x0
+#define MX6DL_PAD_SD3_DAT0__UART1_CTS_B 0x314 0x6fc 0x8f8 0x1 0x2
#define MX6DL_PAD_SD3_DAT0__FLEXCAN2_TX 0x314 0x6fc 0x000 0x2 0x0
#define MX6DL_PAD_SD3_DAT0__GPIO7_IO04 0x314 0x6fc 0x000 0x5 0x0
#define MX6DL_PAD_SD3_DAT1__SD3_DATA1 0x318 0x700 0x000 0x0 0x0
-#define MX6DL_PAD_SD3_DAT1__UART1_RTS_B 0x318 0x700 0x8f8 0x1 0x3
-#define MX6DL_PAD_SD3_DAT1__UART1_CTS_B 0x318 0x700 0x000 0x1 0x0
+#define MX6DL_PAD_SD3_DAT1__UART1_CTS_B 0x318 0x700 0x8f8 0x1 0x3
+#define MX6DL_PAD_SD3_DAT1__UART1_RTS_B 0x318 0x700 0x000 0x1 0x0
#define MX6DL_PAD_SD3_DAT1__FLEXCAN2_RX 0x318 0x700 0x7cc 0x2 0x1
#define MX6DL_PAD_SD3_DAT1__GPIO7_IO05 0x318 0x700 0x000 0x5 0x0
#define MX6DL_PAD_SD3_DAT2__SD3_DATA2 0x31c 0x704 0x000 0x0 0x0
#define MX6DL_PAD_SD3_DAT2__GPIO7_IO06 0x31c 0x704 0x000 0x5 0x0
#define MX6DL_PAD_SD3_DAT3__SD3_DATA3 0x320 0x708 0x000 0x0 0x0
-#define MX6DL_PAD_SD3_DAT3__UART3_CTS_B 0x320 0x708 0x000 0x1 0x0
-#define MX6DL_PAD_SD3_DAT3__UART3_RTS_B 0x320 0x708 0x908 0x1 0x4
+#define MX6DL_PAD_SD3_DAT3__UART3_RTS_B 0x320 0x708 0x000 0x1 0x0
+#define MX6DL_PAD_SD3_DAT3__UART3_CTS_B 0x320 0x708 0x908 0x1 0x4
#define MX6DL_PAD_SD3_DAT3__GPIO7_IO07 0x320 0x708 0x000 0x5 0x0
#define MX6DL_PAD_SD3_DAT4__SD3_DATA4 0x324 0x70c 0x000 0x0 0x0
#define MX6DL_PAD_SD3_DAT4__UART2_RX_DATA 0x324 0x70c 0x904 0x1 0x4
@@ -1041,8 +1041,8 @@
#define MX6DL_PAD_SD3_DAT7__UART1_RX_DATA 0x330 0x718 0x8fc 0x1 0x3
#define MX6DL_PAD_SD3_DAT7__GPIO6_IO17 0x330 0x718 0x000 0x5 0x0
#define MX6DL_PAD_SD3_RST__SD3_RESET 0x334 0x71c 0x000 0x0 0x0
-#define MX6DL_PAD_SD3_RST__UART3_RTS_B 0x334 0x71c 0x908 0x1 0x5
-#define MX6DL_PAD_SD3_RST__UART3_CTS_B 0x334 0x71c 0x000 0x1 0x0
+#define MX6DL_PAD_SD3_RST__UART3_CTS_B 0x334 0x71c 0x908 0x1 0x5
+#define MX6DL_PAD_SD3_RST__UART3_RTS_B 0x334 0x71c 0x000 0x1 0x0
#define MX6DL_PAD_SD3_RST__GPIO7_IO08 0x334 0x71c 0x000 0x5 0x0
#define MX6DL_PAD_SD4_CLK__SD4_CLK 0x338 0x720 0x938 0x0 0x1
#define MX6DL_PAD_SD4_CLK__NAND_WE_B 0x338 0x720 0x000 0x1 0x0
@@ -1070,12 +1070,12 @@
#define MX6DL_PAD_SD4_DAT4__UART2_TX_DATA 0x350 0x738 0x000 0x2 0x0
#define MX6DL_PAD_SD4_DAT4__GPIO2_IO12 0x350 0x738 0x000 0x5 0x0
#define MX6DL_PAD_SD4_DAT5__SD4_DATA5 0x354 0x73c 0x000 0x1 0x0
-#define MX6DL_PAD_SD4_DAT5__UART2_RTS_B 0x354 0x73c 0x900 0x2 0x4
-#define MX6DL_PAD_SD4_DAT5__UART2_CTS_B 0x354 0x73c 0x000 0x2 0x0
+#define MX6DL_PAD_SD4_DAT5__UART2_CTS_B 0x354 0x73c 0x900 0x2 0x4
+#define MX6DL_PAD_SD4_DAT5__UART2_RTS_B 0x354 0x73c 0x000 0x2 0x0
#define MX6DL_PAD_SD4_DAT5__GPIO2_IO13 0x354 0x73c 0x000 0x5 0x0
#define MX6DL_PAD_SD4_DAT6__SD4_DATA6 0x358 0x740 0x000 0x1 0x0
-#define MX6DL_PAD_SD4_DAT6__UART2_CTS_B 0x358 0x740 0x000 0x2 0x0
-#define MX6DL_PAD_SD4_DAT6__UART2_RTS_B 0x358 0x740 0x900 0x2 0x5
+#define MX6DL_PAD_SD4_DAT6__UART2_RTS_B 0x358 0x740 0x000 0x2 0x0
+#define MX6DL_PAD_SD4_DAT6__UART2_CTS_B 0x358 0x740 0x900 0x2 0x5
#define MX6DL_PAD_SD4_DAT6__GPIO2_IO14 0x358 0x740 0x000 0x5 0x0
#define MX6DL_PAD_SD4_DAT7__SD4_DATA7 0x35c 0x744 0x000 0x1 0x0
#define MX6DL_PAD_SD4_DAT7__UART2_TX_DATA 0x35c 0x744 0x000 0x2 0x0
diff --git a/arch/arm/boot/dts/imx6q-pinfunc.h b/arch/arm/boot/dts/imx6q-pinfunc.h
index faea6e1..a38838d 100644
--- a/arch/arm/boot/dts/imx6q-pinfunc.h
+++ b/arch/arm/boot/dts/imx6q-pinfunc.h
@@ -110,16 +110,16 @@
#define MX6Q_PAD_EIM_D19__ECSPI1_SS1 0x09c 0x3b0 0x804 0x1 0x0
#define MX6Q_PAD_EIM_D19__IPU1_DI0_PIN08 0x09c 0x3b0 0x000 0x2 0x0
#define MX6Q_PAD_EIM_D19__IPU2_CSI1_DATA16 0x09c 0x3b0 0x8c8 0x3 0x0
-#define MX6Q_PAD_EIM_D19__UART1_CTS_B 0x09c 0x3b0 0x000 0x4 0x0
-#define MX6Q_PAD_EIM_D19__UART1_RTS_B 0x09c 0x3b0 0x91c 0x4 0x0
+#define MX6Q_PAD_EIM_D19__UART1_RTS_B 0x09c 0x3b0 0x000 0x4 0x0
+#define MX6Q_PAD_EIM_D19__UART1_CTS_B 0x09c 0x3b0 0x91c 0x4 0x0
#define MX6Q_PAD_EIM_D19__GPIO3_IO19 0x09c 0x3b0 0x000 0x5 0x0
#define MX6Q_PAD_EIM_D19__EPIT1_OUT 0x09c 0x3b0 0x000 0x6 0x0
#define MX6Q_PAD_EIM_D20__EIM_DATA20 0x0a0 0x3b4 0x000 0x0 0x0
#define MX6Q_PAD_EIM_D20__ECSPI4_SS0 0x0a0 0x3b4 0x824 0x1 0x0
#define MX6Q_PAD_EIM_D20__IPU1_DI0_PIN16 0x0a0 0x3b4 0x000 0x2 0x0
#define MX6Q_PAD_EIM_D20__IPU2_CSI1_DATA15 0x0a0 0x3b4 0x8c4 0x3 0x0
-#define MX6Q_PAD_EIM_D20__UART1_RTS_B 0x0a0 0x3b4 0x91c 0x4 0x1
-#define MX6Q_PAD_EIM_D20__UART1_CTS_B 0x0a0 0x3b4 0x000 0x4 0x0
+#define MX6Q_PAD_EIM_D20__UART1_CTS_B 0x0a0 0x3b4 0x91c 0x4 0x1
+#define MX6Q_PAD_EIM_D20__UART1_RTS_B 0x0a0 0x3b4 0x000 0x4 0x0
#define MX6Q_PAD_EIM_D20__GPIO3_IO20 0x0a0 0x3b4 0x000 0x5 0x0
#define MX6Q_PAD_EIM_D20__EPIT2_OUT 0x0a0 0x3b4 0x000 0x6 0x0
#define MX6Q_PAD_EIM_D21__EIM_DATA21 0x0a4 0x3b8 0x000 0x0 0x0
@@ -139,8 +139,8 @@
#define MX6Q_PAD_EIM_D22__SPDIF_OUT 0x0a8 0x3bc 0x000 0x6 0x0
#define MX6Q_PAD_EIM_D23__EIM_DATA23 0x0ac 0x3c0 0x000 0x0 0x0
#define MX6Q_PAD_EIM_D23__IPU1_DI0_D0_CS 0x0ac 0x3c0 0x000 0x1 0x0
-#define MX6Q_PAD_EIM_D23__UART3_CTS_B 0x0ac 0x3c0 0x000 0x2 0x0
-#define MX6Q_PAD_EIM_D23__UART3_RTS_B 0x0ac 0x3c0 0x92c 0x2 0x0
+#define MX6Q_PAD_EIM_D23__UART3_RTS_B 0x0ac 0x3c0 0x000 0x2 0x0
+#define MX6Q_PAD_EIM_D23__UART3_CTS_B 0x0ac 0x3c0 0x92c 0x2 0x0
#define MX6Q_PAD_EIM_D23__UART1_DCD_B 0x0ac 0x3c0 0x000 0x3 0x0
#define MX6Q_PAD_EIM_D23__IPU2_CSI1_DATA_EN 0x0ac 0x3c0 0x8d8 0x4 0x0
#define MX6Q_PAD_EIM_D23__GPIO3_IO23 0x0ac 0x3c0 0x000 0x5 0x0
@@ -148,8 +148,8 @@
#define MX6Q_PAD_EIM_D23__IPU1_DI1_PIN14 0x0ac 0x3c0 0x000 0x7 0x0
#define MX6Q_PAD_EIM_EB3__EIM_EB3_B 0x0b0 0x3c4 0x000 0x0 0x0
#define MX6Q_PAD_EIM_EB3__ECSPI4_RDY 0x0b0 0x3c4 0x000 0x1 0x0
-#define MX6Q_PAD_EIM_EB3__UART3_RTS_B 0x0b0 0x3c4 0x92c 0x2 0x1
-#define MX6Q_PAD_EIM_EB3__UART3_CTS_B 0x0b0 0x3c4 0x000 0x2 0x0
+#define MX6Q_PAD_EIM_EB3__UART3_CTS_B 0x0b0 0x3c4 0x92c 0x2 0x1
+#define MX6Q_PAD_EIM_EB3__UART3_RTS_B 0x0b0 0x3c4 0x000 0x2 0x0
#define MX6Q_PAD_EIM_EB3__UART1_RI_B 0x0b0 0x3c4 0x000 0x3 0x0
#define MX6Q_PAD_EIM_EB3__IPU2_CSI1_HSYNC 0x0b0 0x3c4 0x8dc 0x4 0x0
#define MX6Q_PAD_EIM_EB3__GPIO2_IO31 0x0b0 0x3c4 0x000 0x5 0x0
@@ -195,16 +195,16 @@
#define MX6Q_PAD_EIM_D28__I2C1_SDA 0x0c4 0x3d8 0x89c 0x1 0x0
#define MX6Q_PAD_EIM_D28__ECSPI4_MOSI 0x0c4 0x3d8 0x000 0x2 0x0
#define MX6Q_PAD_EIM_D28__IPU2_CSI1_DATA12 0x0c4 0x3d8 0x8b8 0x3 0x0
-#define MX6Q_PAD_EIM_D28__UART2_CTS_B 0x0c4 0x3d8 0x000 0x4 0x0
-#define MX6Q_PAD_EIM_D28__UART2_RTS_B 0x0c4 0x3d8 0x924 0x4 0x0
+#define MX6Q_PAD_EIM_D28__UART2_RTS_B 0x0c4 0x3d8 0x000 0x4 0x0
+#define MX6Q_PAD_EIM_D28__UART2_CTS_B 0x0c4 0x3d8 0x924 0x4 0x0
#define MX6Q_PAD_EIM_D28__GPIO3_IO28 0x0c4 0x3d8 0x000 0x5 0x0
#define MX6Q_PAD_EIM_D28__IPU1_EXT_TRIG 0x0c4 0x3d8 0x000 0x6 0x0
#define MX6Q_PAD_EIM_D28__IPU1_DI0_PIN13 0x0c4 0x3d8 0x000 0x7 0x0
#define MX6Q_PAD_EIM_D29__EIM_DATA29 0x0c8 0x3dc 0x000 0x0 0x0
#define MX6Q_PAD_EIM_D29__IPU1_DI1_PIN15 0x0c8 0x3dc 0x000 0x1 0x0
#define MX6Q_PAD_EIM_D29__ECSPI4_SS0 0x0c8 0x3dc 0x824 0x2 0x1
-#define MX6Q_PAD_EIM_D29__UART2_RTS_B 0x0c8 0x3dc 0x924 0x4 0x1
-#define MX6Q_PAD_EIM_D29__UART2_CTS_B 0x0c8 0x3dc 0x000 0x4 0x0
+#define MX6Q_PAD_EIM_D29__UART2_CTS_B 0x0c8 0x3dc 0x924 0x4 0x1
+#define MX6Q_PAD_EIM_D29__UART2_RTS_B 0x0c8 0x3dc 0x000 0x4 0x0
#define MX6Q_PAD_EIM_D29__GPIO3_IO29 0x0c8 0x3dc 0x000 0x5 0x0
#define MX6Q_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x0c8 0x3dc 0x8e4 0x6 0x0
#define MX6Q_PAD_EIM_D29__IPU1_DI0_PIN14 0x0c8 0x3dc 0x000 0x7 0x0
@@ -212,16 +212,16 @@
#define MX6Q_PAD_EIM_D30__IPU1_DISP1_DATA21 0x0cc 0x3e0 0x000 0x1 0x0
#define MX6Q_PAD_EIM_D30__IPU1_DI0_PIN11 0x0cc 0x3e0 0x000 0x2 0x0
#define MX6Q_PAD_EIM_D30__IPU1_CSI0_DATA03 0x0cc 0x3e0 0x000 0x3 0x0
-#define MX6Q_PAD_EIM_D30__UART3_CTS_B 0x0cc 0x3e0 0x000 0x4 0x0
-#define MX6Q_PAD_EIM_D30__UART3_RTS_B 0x0cc 0x3e0 0x92c 0x4 0x2
+#define MX6Q_PAD_EIM_D30__UART3_RTS_B 0x0cc 0x3e0 0x000 0x4 0x0
+#define MX6Q_PAD_EIM_D30__UART3_CTS_B 0x0cc 0x3e0 0x92c 0x4 0x2
#define MX6Q_PAD_EIM_D30__GPIO3_IO30 0x0cc 0x3e0 0x000 0x5 0x0
#define MX6Q_PAD_EIM_D30__USB_H1_OC 0x0cc 0x3e0 0x948 0x6 0x0
#define MX6Q_PAD_EIM_D31__EIM_DATA31 0x0d0 0x3e4 0x000 0x0 0x0
#define MX6Q_PAD_EIM_D31__IPU1_DISP1_DATA20 0x0d0 0x3e4 0x000 0x1 0x0
#define MX6Q_PAD_EIM_D31__IPU1_DI0_PIN12 0x0d0 0x3e4 0x000 0x2 0x0
#define MX6Q_PAD_EIM_D31__IPU1_CSI0_DATA02 0x0d0 0x3e4 0x000 0x3 0x0
-#define MX6Q_PAD_EIM_D31__UART3_RTS_B 0x0d0 0x3e4 0x92c 0x4 0x3
-#define MX6Q_PAD_EIM_D31__UART3_CTS_B 0x0d0 0x3e4 0x000 0x4 0x0
+#define MX6Q_PAD_EIM_D31__UART3_CTS_B 0x0d0 0x3e4 0x92c 0x4 0x3
+#define MX6Q_PAD_EIM_D31__UART3_RTS_B 0x0d0 0x3e4 0x000 0x4 0x0
#define MX6Q_PAD_EIM_D31__GPIO3_IO31 0x0d0 0x3e4 0x000 0x5 0x0
#define MX6Q_PAD_EIM_D31__USB_H1_PWR 0x0d0 0x3e4 0x000 0x6 0x0
#define MX6Q_PAD_EIM_A24__EIM_ADDR24 0x0d4 0x3e8 0x000 0x0 0x0
@@ -630,15 +630,15 @@
#define MX6Q_PAD_KEY_COL4__IPU1_SISG4 0x218 0x5e8 0x000 0x1 0x0
#define MX6Q_PAD_KEY_COL4__USB_OTG_OC 0x218 0x5e8 0x944 0x2 0x1
#define MX6Q_PAD_KEY_COL4__KEY_COL4 0x218 0x5e8 0x000 0x3 0x0
-#define MX6Q_PAD_KEY_COL4__UART5_RTS_B 0x218 0x5e8 0x93c 0x4 0x0
-#define MX6Q_PAD_KEY_COL4__UART5_CTS_B 0x218 0x5e8 0x000 0x4 0x0
+#define MX6Q_PAD_KEY_COL4__UART5_CTS_B 0x218 0x5e8 0x93c 0x4 0x0
+#define MX6Q_PAD_KEY_COL4__UART5_RTS_B 0x218 0x5e8 0x000 0x4 0x0
#define MX6Q_PAD_KEY_COL4__GPIO4_IO14 0x218 0x5e8 0x000 0x5 0x0
#define MX6Q_PAD_KEY_ROW4__FLEXCAN2_RX 0x21c 0x5ec 0x7e8 0x0 0x0
#define MX6Q_PAD_KEY_ROW4__IPU1_SISG5 0x21c 0x5ec 0x000 0x1 0x0
#define MX6Q_PAD_KEY_ROW4__USB_OTG_PWR 0x21c 0x5ec 0x000 0x2 0x0
#define MX6Q_PAD_KEY_ROW4__KEY_ROW4 0x21c 0x5ec 0x000 0x3 0x0
-#define MX6Q_PAD_KEY_ROW4__UART5_CTS_B 0x21c 0x5ec 0x000 0x4 0x0
-#define MX6Q_PAD_KEY_ROW4__UART5_RTS_B 0x21c 0x5ec 0x93c 0x4 0x1
+#define MX6Q_PAD_KEY_ROW4__UART5_RTS_B 0x21c 0x5ec 0x000 0x4 0x0
+#define MX6Q_PAD_KEY_ROW4__UART5_CTS_B 0x21c 0x5ec 0x93c 0x4 0x1
#define MX6Q_PAD_KEY_ROW4__GPIO4_IO15 0x21c 0x5ec 0x000 0x5 0x0
#define MX6Q_PAD_GPIO_0__CCM_CLKO1 0x220 0x5f0 0x000 0x0 0x0
#define MX6Q_PAD_GPIO_0__KEY_COL5 0x220 0x5f0 0x8e8 0x2 0x0
@@ -831,26 +831,26 @@
#define MX6Q_PAD_CSI0_DAT15__ARM_TRACE12 0x294 0x664 0x000 0x7 0x0
#define MX6Q_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x298 0x668 0x000 0x0 0x0
#define MX6Q_PAD_CSI0_DAT16__EIM_DATA12 0x298 0x668 0x000 0x1 0x0
-#define MX6Q_PAD_CSI0_DAT16__UART4_RTS_B 0x298 0x668 0x934 0x3 0x0
-#define MX6Q_PAD_CSI0_DAT16__UART4_CTS_B 0x298 0x668 0x000 0x3 0x0
+#define MX6Q_PAD_CSI0_DAT16__UART4_CTS_B 0x298 0x668 0x934 0x3 0x0
+#define MX6Q_PAD_CSI0_DAT16__UART4_RTS_B 0x298 0x668 0x000 0x3 0x0
#define MX6Q_PAD_CSI0_DAT16__GPIO6_IO02 0x298 0x668 0x000 0x5 0x0
#define MX6Q_PAD_CSI0_DAT16__ARM_TRACE13 0x298 0x668 0x000 0x7 0x0
#define MX6Q_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x29c 0x66c 0x000 0x0 0x0
#define MX6Q_PAD_CSI0_DAT17__EIM_DATA13 0x29c 0x66c 0x000 0x1 0x0
-#define MX6Q_PAD_CSI0_DAT17__UART4_CTS_B 0x29c 0x66c 0x000 0x3 0x0
-#define MX6Q_PAD_CSI0_DAT17__UART4_RTS_B 0x29c 0x66c 0x934 0x3 0x1
+#define MX6Q_PAD_CSI0_DAT17__UART4_RTS_B 0x29c 0x66c 0x000 0x3 0x0
+#define MX6Q_PAD_CSI0_DAT17__UART4_CTS_B 0x29c 0x66c 0x934 0x3 0x1
#define MX6Q_PAD_CSI0_DAT17__GPIO6_IO03 0x29c 0x66c 0x000 0x5 0x0
#define MX6Q_PAD_CSI0_DAT17__ARM_TRACE14 0x29c 0x66c 0x000 0x7 0x0
#define MX6Q_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x2a0 0x670 0x000 0x0 0x0
#define MX6Q_PAD_CSI0_DAT18__EIM_DATA14 0x2a0 0x670 0x000 0x1 0x0
-#define MX6Q_PAD_CSI0_DAT18__UART5_RTS_B 0x2a0 0x670 0x93c 0x3 0x2
-#define MX6Q_PAD_CSI0_DAT18__UART5_CTS_B 0x2a0 0x670 0x000 0x3 0x0
+#define MX6Q_PAD_CSI0_DAT18__UART5_CTS_B 0x2a0 0x670 0x93c 0x3 0x2
+#define MX6Q_PAD_CSI0_DAT18__UART5_RTS_B 0x2a0 0x670 0x000 0x3 0x0
#define MX6Q_PAD_CSI0_DAT18__GPIO6_IO04 0x2a0 0x670 0x000 0x5 0x0
#define MX6Q_PAD_CSI0_DAT18__ARM_TRACE15 0x2a0 0x670 0x000 0x7 0x0
#define MX6Q_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x2a4 0x674 0x000 0x0 0x0
#define MX6Q_PAD_CSI0_DAT19__EIM_DATA15 0x2a4 0x674 0x000 0x1 0x0
-#define MX6Q_PAD_CSI0_DAT19__UART5_CTS_B 0x2a4 0x674 0x000 0x3 0x0
-#define MX6Q_PAD_CSI0_DAT19__UART5_RTS_B 0x2a4 0x674 0x93c 0x3 0x3
+#define MX6Q_PAD_CSI0_DAT19__UART5_RTS_B 0x2a4 0x674 0x000 0x3 0x0
+#define MX6Q_PAD_CSI0_DAT19__UART5_CTS_B 0x2a4 0x674 0x93c 0x3 0x3
#define MX6Q_PAD_CSI0_DAT19__GPIO6_IO05 0x2a4 0x674 0x000 0x5 0x0
#define MX6Q_PAD_SD3_DAT7__SD3_DATA7 0x2a8 0x690 0x000 0x0 0x0
#define MX6Q_PAD_SD3_DAT7__UART1_TX_DATA 0x2a8 0x690 0x000 0x1 0x0
@@ -869,34 +869,34 @@
#define MX6Q_PAD_SD3_DAT4__UART2_TX_DATA 0x2b4 0x69c 0x000 0x1 0x0
#define MX6Q_PAD_SD3_DAT4__GPIO7_IO01 0x2b4 0x69c 0x000 0x5 0x0
#define MX6Q_PAD_SD3_CMD__SD3_CMD 0x2b8 0x6a0 0x000 0x0 0x0
-#define MX6Q_PAD_SD3_CMD__UART2_CTS_B 0x2b8 0x6a0 0x000 0x1 0x0
-#define MX6Q_PAD_SD3_CMD__UART2_RTS_B 0x2b8 0x6a0 0x924 0x1 0x2
+#define MX6Q_PAD_SD3_CMD__UART2_RTS_B 0x2b8 0x6a0 0x000 0x1 0x0
+#define MX6Q_PAD_SD3_CMD__UART2_CTS_B 0x2b8 0x6a0 0x924 0x1 0x2
#define MX6Q_PAD_SD3_CMD__FLEXCAN1_TX 0x2b8 0x6a0 0x000 0x2 0x0
#define MX6Q_PAD_SD3_CMD__GPIO7_IO02 0x2b8 0x6a0 0x000 0x5 0x0
#define MX6Q_PAD_SD3_CLK__SD3_CLK 0x2bc 0x6a4 0x000 0x0 0x0
-#define MX6Q_PAD_SD3_CLK__UART2_RTS_B 0x2bc 0x6a4 0x924 0x1 0x3
-#define MX6Q_PAD_SD3_CLK__UART2_CTS_B 0x2bc 0x6a4 0x000 0x1 0x0
+#define MX6Q_PAD_SD3_CLK__UART2_CTS_B 0x2bc 0x6a4 0x924 0x1 0x3
+#define MX6Q_PAD_SD3_CLK__UART2_RTS_B 0x2bc 0x6a4 0x000 0x1 0x0
#define MX6Q_PAD_SD3_CLK__FLEXCAN1_RX 0x2bc 0x6a4 0x7e4 0x2 0x2
#define MX6Q_PAD_SD3_CLK__GPIO7_IO03 0x2bc 0x6a4 0x000 0x5 0x0
#define MX6Q_PAD_SD3_DAT0__SD3_DATA0 0x2c0 0x6a8 0x000 0x0 0x0
-#define MX6Q_PAD_SD3_DAT0__UART1_CTS_B 0x2c0 0x6a8 0x000 0x1 0x0
-#define MX6Q_PAD_SD3_DAT0__UART1_RTS_B 0x2c0 0x6a8 0x91c 0x1 0x2
+#define MX6Q_PAD_SD3_DAT0__UART1_RTS_B 0x2c0 0x6a8 0x000 0x1 0x0
+#define MX6Q_PAD_SD3_DAT0__UART1_CTS_B 0x2c0 0x6a8 0x91c 0x1 0x2
#define MX6Q_PAD_SD3_DAT0__FLEXCAN2_TX 0x2c0 0x6a8 0x000 0x2 0x0
#define MX6Q_PAD_SD3_DAT0__GPIO7_IO04 0x2c0 0x6a8 0x000 0x5 0x0
#define MX6Q_PAD_SD3_DAT1__SD3_DATA1 0x2c4 0x6ac 0x000 0x0 0x0
-#define MX6Q_PAD_SD3_DAT1__UART1_RTS_B 0x2c4 0x6ac 0x91c 0x1 0x3
-#define MX6Q_PAD_SD3_DAT1__UART1_CTS_B 0x2c4 0x6ac 0x000 0x1 0x0
+#define MX6Q_PAD_SD3_DAT1__UART1_CTS_B 0x2c4 0x6ac 0x91c 0x1 0x3
+#define MX6Q_PAD_SD3_DAT1__UART1_RTS_B 0x2c4 0x6ac 0x000 0x1 0x0
#define MX6Q_PAD_SD3_DAT1__FLEXCAN2_RX 0x2c4 0x6ac 0x7e8 0x2 0x1
#define MX6Q_PAD_SD3_DAT1__GPIO7_IO05 0x2c4 0x6ac 0x000 0x5 0x0
#define MX6Q_PAD_SD3_DAT2__SD3_DATA2 0x2c8 0x6b0 0x000 0x0 0x0
#define MX6Q_PAD_SD3_DAT2__GPIO7_IO06 0x2c8 0x6b0 0x000 0x5 0x0
#define MX6Q_PAD_SD3_DAT3__SD3_DATA3 0x2cc 0x6b4 0x000 0x0 0x0
-#define MX6Q_PAD_SD3_DAT3__UART3_CTS_B 0x2cc 0x6b4 0x000 0x1 0x0
-#define MX6Q_PAD_SD3_DAT3__UART3_RTS_B 0x2cc 0x6b4 0x92c 0x1 0x4
+#define MX6Q_PAD_SD3_DAT3__UART3_RTS_B 0x2cc 0x6b4 0x000 0x1 0x0
+#define MX6Q_PAD_SD3_DAT3__UART3_CTS_B 0x2cc 0x6b4 0x92c 0x1 0x4
#define MX6Q_PAD_SD3_DAT3__GPIO7_IO07 0x2cc 0x6b4 0x000 0x5 0x0
#define MX6Q_PAD_SD3_RST__SD3_RESET 0x2d0 0x6b8 0x000 0x0 0x0
-#define MX6Q_PAD_SD3_RST__UART3_RTS_B 0x2d0 0x6b8 0x92c 0x1 0x5
-#define MX6Q_PAD_SD3_RST__UART3_CTS_B 0x2d0 0x6b8 0x000 0x1 0x0
+#define MX6Q_PAD_SD3_RST__UART3_CTS_B 0x2d0 0x6b8 0x92c 0x1 0x5
+#define MX6Q_PAD_SD3_RST__UART3_RTS_B 0x2d0 0x6b8 0x000 0x1 0x0
#define MX6Q_PAD_SD3_RST__GPIO7_IO08 0x2d0 0x6b8 0x000 0x5 0x0
#define MX6Q_PAD_NANDF_CLE__NAND_CLE 0x2d4 0x6bc 0x000 0x0 0x0
#define MX6Q_PAD_NANDF_CLE__IPU2_SISG4 0x2d4 0x6bc 0x000 0x1 0x0
@@ -979,12 +979,12 @@
#define MX6Q_PAD_SD4_DAT4__UART2_TX_DATA 0x32c 0x714 0x000 0x2 0x0
#define MX6Q_PAD_SD4_DAT4__GPIO2_IO12 0x32c 0x714 0x000 0x5 0x0
#define MX6Q_PAD_SD4_DAT5__SD4_DATA5 0x330 0x718 0x000 0x1 0x0
-#define MX6Q_PAD_SD4_DAT5__UART2_RTS_B 0x330 0x718 0x924 0x2 0x4
-#define MX6Q_PAD_SD4_DAT5__UART2_CTS_B 0x330 0x718 0x000 0x2 0x0
+#define MX6Q_PAD_SD4_DAT5__UART2_CTS_B 0x330 0x718 0x924 0x2 0x4
+#define MX6Q_PAD_SD4_DAT5__UART2_RTS_B 0x330 0x718 0x000 0x2 0x0
#define MX6Q_PAD_SD4_DAT5__GPIO2_IO13 0x330 0x718 0x000 0x5 0x0
#define MX6Q_PAD_SD4_DAT6__SD4_DATA6 0x334 0x71c 0x000 0x1 0x0
-#define MX6Q_PAD_SD4_DAT6__UART2_CTS_B 0x334 0x71c 0x000 0x2 0x0
-#define MX6Q_PAD_SD4_DAT6__UART2_RTS_B 0x334 0x71c 0x924 0x2 0x5
+#define MX6Q_PAD_SD4_DAT6__UART2_RTS_B 0x334 0x71c 0x000 0x2 0x0
+#define MX6Q_PAD_SD4_DAT6__UART2_CTS_B 0x334 0x71c 0x924 0x2 0x5
#define MX6Q_PAD_SD4_DAT6__GPIO2_IO14 0x334 0x71c 0x000 0x5 0x0
#define MX6Q_PAD_SD4_DAT7__SD4_DATA7 0x338 0x720 0x000 0x1 0x0
#define MX6Q_PAD_SD4_DAT7__UART2_TX_DATA 0x338 0x720 0x000 0x2 0x0
--
1.7.1
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