[PATCH] ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi

[Stephen Warren]

On 01/23/2013 09:57 AM, Stephen Warren wrote:
> From: Stephen Warren <swarren at nvidia.com>
> 
> No Tegra30 Platform is running PLL_P at another rate than 408MHz, nor is
> any using any other PLL as UART source clock. Move attribute into SoC
> level dtsi file to slim down board DT files.

I have applied this to Tegra's for-3.9/dt branch.