[PATCH v2 1/3] ARM: DT: tegra: move serial clock-frequency attr into the SoC dtsi

Stephen Warren swarren at wwwdotorg.org
Wed Jan 23 11:47:50 EST 2013

On 01/22/2013 02:46 PM, Lucas Stach wrote:
> No Tegra Platform is running PLL_P at another rate than 216MHz, nor is
> any using an other PLL as UART source clock. Move attribute into SoC
> level dtsi file to slim down board DT files.

I've applied the series to Tegra's for-3.9/dt branch.

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