[PATCH] clk: tegra: add KBC clock for Tegra20
Mike Turquette
mturquette at linaro.org
Tue Jan 22 13:23:40 EST 2013
Quoting Stephen Warren (2013-01-11 15:17:42)
> From: Stephen Warren <swarren at nvidia.com>
>
> This clock has been missing from all our upstream clock drivers. Add it
> by copying the tegra_clk_periph_gate() call from Tegra30; the data
> matches what's in the ChromeOS kernel for this clock.
>
> Cc: Prashant Gaikwad <pgaikwad at nvidia.com>
> Cc: Peter De Schrijver <pdeschrijver at nvidia.com>
> Signed-off-by: Stephen Warren <swarren at nvidia.com>
> ---
> Mike, I'd need to apply this to the Tegra tree as part of the common
> clock framework conversion.
>
Is this patch going to be rolled into patch 6/9 of the larger tegra ccf
series?
Thanks,
Mike
> drivers/clk/tegra/clk-tegra20.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c
> index f40b6f7..5847b5e 100644
> --- a/drivers/clk/tegra/clk-tegra20.c
> +++ b/drivers/clk/tegra/clk-tegra20.c
> @@ -896,6 +896,13 @@ static void __init tegra20_periph_clk_init(void)
> clk_register_clkdev(clk, NULL, "timer");
> clks[timer] = clk;
>
> + /* kbc */
> + clk = tegra_clk_periph_gate("kbc", "clk_32k", TEGRA_PERIPH_NO_RESET |
> + TEGRA_PERIPH_ON_APB, clk_base, 0,
> + 36, &periph_h_regs, periph_clk_enb_refcnt);
> + clk_register_clkdev(clk, NULL, "tegra-kbc");
> + clks[kbc] = clk;
> +
> /* csus */
> clk = tegra_clk_periph_gate("csus", "clk_m", TEGRA_PERIPH_NO_RESET,
> clk_base, 0, 92, &periph_u_regs,
> --
> 1.7.10.4
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