[PATCH 07/16] ARM: bL_platsmp.c: close the kernel entry gate before hot-unplugging a CPU
Nicolas Pitre
nicolas.pitre at linaro.org
Mon Jan 14 11:53:41 EST 2013
On Mon, 14 Jan 2013, Will Deacon wrote:
> On Thu, Jan 10, 2013 at 12:20:42AM +0000, Nicolas Pitre wrote:
> > If for whatever reason a CPU is unexpectedly awaken, it shouldn't
> > re-enter the kernel by using whatever entry vector that might have
> > been set by a previous operation.
> >
> > Signed-off-by: Nicolas Pitre <nico at linaro.org>
> > ---
> > arch/arm/common/bL_platsmp.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/arch/arm/common/bL_platsmp.c b/arch/arm/common/bL_platsmp.c
> > index 0acb9f4685..0ae44123bf 100644
> > --- a/arch/arm/common/bL_platsmp.c
> > +++ b/arch/arm/common/bL_platsmp.c
> > @@ -63,6 +63,11 @@ static int bL_cpu_disable(unsigned int cpu)
> >
> > static void __ref bL_cpu_die(unsigned int cpu)
> > {
> > + unsigned int mpidr, pcpu, pcluster;
> > + asm ("mrc p15, 0, %0, c0, c0, 5" : "=r" (mpidr));
> > + pcpu = mpidr & 0xff;
> > + pcluster = (mpidr >> 8) & 0xff;
>
> Usual comment about helper functions :)
>
> > + bL_set_entry_vector(pcpu, pcluster, NULL);
>
> Similar to the power_on story, you need a barrier here (unless you change
> your platform_ops API to require barriers).
The bL_set_entry_vector() includes a cache flush which itself has a DSB.
Hence my previous interrogation.
Nicolas
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