[v2 3/9] ARM: tegra: # of CPU cores detection w/ & w/o HAVE_ARM_SCU

[Mark Rutland]

On Tue, Jan 08, 2013 at 02:53:42PM +0000, Hiroshi Doyu wrote:
> Hi Mark,
> 
> Mark Rutland <mark.rutland at arm.com> wrote @ Tue, 8 Jan 2013 15:28:28 +0100:
> 
> > Hello,
> > 
> > On Tue, Jan 08, 2013 at 12:47:37PM +0000, Hiroshi Doyu wrote:
> > > The method to detect the number of CPU cores on Cortex-A9 MPCore and
> > > Cortex-A15 MPCore is different. On Cortex-A9 MPCore we can get this
> > > information from the Snoop Control Unit(SCU). On Cortex-A15 MPCore we
> > > have to read it from the system coprocessor(CP15), because the SCU on
> > > Cortex-A15 MPCore does not have software readable registers. This
> > > patch selects the correct method at runtime based on the CPU ID.
> > > 
> > > Signed-off-by: Hiroshi Doyu <hdoyu at nvidia.com>
> > > ---
> > >  arch/arm/mach-tegra/platsmp.c |   31 ++++++++++++++++++++++++++++---
> > >  1 file changed, 28 insertions(+), 3 deletions(-)
> > > 
> > > diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
> > > index 1b926df..68e76ef 100644
> > > --- a/arch/arm/mach-tegra/platsmp.c
> > > +++ b/arch/arm/mach-tegra/platsmp.c
> > > @@ -23,6 +23,7 @@
> > >  #include <asm/hardware/gic.h>
> > >  #include <asm/mach-types.h>
> > >  #include <asm/smp_scu.h>
> > > +#include <asm/cputype.h>
> > >  
> > >  #include <mach/powergate.h>
> > >  
> > > @@ -34,9 +35,13 @@
> > >  #include "common.h"
> > >  #include "iomap.h"
> > >  
> > > +#define CPU_MASK		0xff0ffff0
> > > +#define CPU_CORTEX_A9		0x410fc090
> > > +#define CPU_CORTEX_A15		0x410fc0f0
> > > +
> > >  extern void tegra_secondary_startup(void);
> > >  
> > > -static void __iomem *scu_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE);
> > > +static void __iomem *scu_base;
> > >  
> > >  #define EVP_CPU_RESET_VECTOR \
> > >  	(IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x100)
> > > @@ -149,7 +154,26 @@ done:
> > >   */
> > >  static void __init tegra_smp_init_cpus(void)
> > >  {
> > > -	unsigned int i, ncores = scu_get_core_count(scu_base);
> > > +	unsigned int i, cpu_id, ncores;
> > > +	u32 l2ctlr;
> > > +	phys_addr_t pa;
> > > +
> > > +	cpu_id = read_cpuid(CPUID_ID) & CPU_MASK;
> > > +	switch (cpu_id) {
> > > +	case CPU_CORTEX_A15:
> > > +		asm("mrc p15, 1, %0, c9, c0, 2\n" : "=r" (l2ctlr));
> > > +		ncores = ((l2ctlr >> 24) & 3) + 1;
> > > +		break;
> > 
> > [...]
> > 
> > As mentioned last time [1], you should get this information from the dt
> > instead.
> 
> Most of platsmp.c:.smp_init_cpus() implementations seem just to
> overwrite # of cores by SCU/MRC detection. Is there any implementation
> to use the DT's # and skip SCU/MRC detection in .smp_init_cpus()?

As far as I can see, there's no other platform which just relies on
arm_dt_init_cpu_maps. Until recently, it didn't exist, so that makes some
sense. As far as I can see, for the Tegra 114 you only need your smp_init_cpus
to call set_smp_cross_call(gic_raise_softirq). Everything else you do seems to
be handled by arm_dt_init_cpus.

I think the best option would be to have a separate smp_ops for your dt
platforms where we know cpu nodes are populated (e.g. Tegra 114), where
smp_init_cpus is different to that for non-dt platforms. That way non dt
platforms can keep the SCU hack for now, and won't be broken, and the dt
platforms are far removed from the SCU hack and just use common infrastructure.

Maybe someone else has a better idea?

Thanks,
Mark.