[PATCH v2 19/27] pci: PCIe driver for Marvell Armada 370/XP systems
thomas.petazzoni at free-electrons.com
Thu Feb 7 12:37:43 EST 2013
Dear Andrew Murray,
On Thu, 7 Feb 2013 17:29:34 +0000, Andrew Murray wrote:
> > So if I ignore the bus number, how could the PCI code find what is the
> > matching interrupt?
> Apologies if I've missed information about your hardware in the other
> discussion (I've tried to keep up) - does your hardware raise a single host
> interrupt for each pin regardless to which bridge they come in on - or do you
> separate A,B,C,D host interrupts for each bridge?
There are separate A,B,C,D interrupts for each PCIe interface, and each
PCIe interface is represented by an emulated PCI-to-PCI bridge. See my
interrupt-map = <0x0800 0 0 1 &mpic 58
0x1000 0 0 1 &mpic 59
0x1800 0 0 1 &mpic 60
0x2000 0 0 1 &mpic 61
0x2800 0 0 1 &mpic 62
0x3000 0 0 1 &mpic 63
0x3800 0 0 1 &mpic 64
0x4000 0 0 1 &mpic 65
0x4800 0 0 1 &mpic 99
0x5000 0 0 1 &mpic 103>;
Here I have 10 PCIe interfaces, and therefore 10 interrupts.
There is only one interrupt per PCIe interface, and for now, I don't
distinguish A,B,C,D (I will do it later, it requires reading a register
to know if the interrupt came from A, B, C or D, but that's a different
> If you have only 4 interrupt sources for legacy interrupts then you shouldn't
> need to care which bus/device/function they were generated on (of_pci_map_irq
> takes care of this for you).
No, I have interrupts per PCIe interface, so I really need to take care
of the relation between the PCIe device and the PCIe interface it is
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
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