[PATCH v3 11/15] ARM: vexpress/dcscb: do not hardcode number of CPUs per cluster

Santosh Shilimkar santosh.shilimkar at ti.com
Sat Feb 2 01:54:11 EST 2013


On Friday 01 February 2013 10:54 PM, Nicolas Pitre wrote:
> On Fri, 1 Feb 2013, Santosh Shilimkar wrote:
>
>> On Tuesday 29 January 2013 01:21 PM, Nicolas Pitre wrote:
>>> If 4 CPUs are assumed, the A15x1-A7x1 model configuration would never
>>> shut down the initial cluster as the 0xf reset bit mask will never be
>>> observed.  Let's construct this mask based on the provided information
>>> in the DCSCB config register for the number of CPUs per cluster.
>>>
>>> Signed-off-by: Nicolas Pitre <nico at linaro.org>
>>> ---
>>>    arch/arm/mach-vexpress/dcscb.c | 14 ++++++++++----
>>>    1 file changed, 10 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-vexpress/dcscb.c b/arch/arm/mach-vexpress/dcscb.c
>>> index f993608944..8d363357ef 100644
>>> --- a/arch/arm/mach-vexpress/dcscb.c
>>> +++ b/arch/arm/mach-vexpress/dcscb.c
>>> @@ -46,10 +46,12 @@ static arch_spinlock_t dcscb_lock =
>>> __ARCH_SPIN_LOCK_UNLOCKED;
>>>
>>>    static void __iomem *dcscb_base;
>>>    static int dcscb_use_count[4][2];
>>> +static int dcscb_mcpm_cpu_mask[2];
>> s/2/MAX_CLUSTERS ?
>
> No.  The DCSCB (*dual* cluster system control block) does manage only 2
> clusters, regardless of the MAX_CLUSTERS definition which might increase
> in the future.
>
OK. Thanks for clarification.

Regards
Santosh




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