[PATCH] ARM: imx6qdl-wandboard: Add spdif support
Fabio Estevam
festevam at gmail.com
Fri Aug 30 14:26:05 EDT 2013
From: Fabio Estevam <fabio.estevam at freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
---
I can see the spdif card getting probed. When I run 'aplay the spdif
light turns on, but I cannot test it due to the lack of spdif equipment at the
moment.
arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 13 +++++++++++++
arch/arm/boot/dts/imx6qdl.dtsi | 32 ++++++++++++++++++++++++++++----
2 files changed, 41 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
index a55113e..6ab91be 100644
--- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
@@ -43,6 +43,13 @@
mux-int-port = <1>;
mux-ext-port = <3>;
};
+
+ sound-spdif {
+ compatible = "fsl,imx-audio-spdif";
+ model = "imx-spdif";
+ spdif-controller = <&spdif>;
+ spdif-out;
+ };
};
&audmux {
@@ -93,6 +100,12 @@
status = "okay";
};
+&spdif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spdif_3>;
+ status = "okay";
+};
+
&ssi1 {
fsl,mode = "i2s-slave";
status = "okay";
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index ccd55c2..d0324ba 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -135,10 +135,27 @@
reg = <0x02000000 0x40000>;
ranges;
- spdif: spdif at 02004000 {
- reg = <0x02004000 0x4000>;
- interrupts = <0 52 0x04>;
- };
+ spdif: spdif at 02004000 {
+ compatible = "fsl,imx35-spdif";
+ reg = <0x02004000 0x4000>;
+ interrupts = <0 52 0x04>;
+ dmas = <&sdma 14 18 0>,
+ <&sdma 15 18 0>;
+ dma-names = "rx", "tx";
+
+ clocks = <&clks 197>, <&clks 3>,
+ <&clks 197>, <&clks 107>,
+ <&clks 0>, <&clks 118>,
+ <&clks 62>, <&clks 139>,
+ <&clks 0>;
+ clock-names = "core", "rxtx0",
+ "rxtx1", "rxtx2",
+ "rxtx3", "rxtx4",
+ "rxtx5", "rxtx6",
+ "rxtx7";
+
+ status = "disabled";
+ };
ecspi1: ecspi at 02008000 {
#address-cells = <1>;
@@ -1010,6 +1027,13 @@
MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
>;
};
+
+ pinctrl_spdif_3: spdifgrp-3 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
+ >;
+ };
+
};
uart1 {
--
1.8.1.2
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