[PATCHv2 4/4] Documentation: Add device tree bindings for Freescale FTM PWM.
Sascha Hauer
s.hauer at pengutronix.de
Fri Aug 30 13:30:08 EDT 2013
On Fri, Aug 30, 2013 at 05:48:52PM +0800, Xiubo Li wrote:
> This patch adds the document for Freescale FTM PWM driver under
> Documentation/devicetree/bindings/pwm/.
>
> Signed-off-by: Xiubo Li <Li.Xiubo at freescale.com>
> ---
> .../devicetree/bindings/pwm/pwm-fsl-ftm.txt | 40 ++++++++++++++++++++++
> 1 file changed, 40 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
> new file mode 100644
> index 0000000..b2b5214
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
> @@ -0,0 +1,40 @@
> +Freescale FTM PWM controller
> +
> +Required properties:
> +- compatible: Should be "fsl,vf610-ftm-pwm"
> +- reg: Physical base address and length of the controller's registers
> +- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
> + the cells format.
> +- clock-names : Includes the following module clock source entries:
> + "ftm0" (system clock),
> + "ftm0_fix_sel" (fixed frequency clock),
> + "ftm0_ext_sel" (external clock)
> +- clocks : Must contain an entry list for entries in clock-names.
> +- fsl,pwm-counter-clk: The FTM PWM counter clock source, should be one of the
> + entries in clock-names.
> +- fsl,pwm-avaliable-chs: The FTM channels ID list of current board which are
> + available as PWM function.
> +- For each channel's pinctrl, the "chN-active" and "chN-idle" states should be
> + implemented at same time.
> +
> +Example:
> +
> +pwm0: pwm at 40038000 {
> + compatible = "fsl,vf610-ftm-pwm";
> + reg = <0x40038000 0x1000>;
> + #pwm-cells = <3>;
> + clock-names = "ftm0", "ftm0_fix_sel", "ftm0_ext_sel";
> + clocks = <&clks VF610_CLK_FTM0>,
> + <&clks VF610_CLK_FTM0_FIX_SEL>,
> + <&clks VF610_CLK_FTM0_EXT_SEL>;
> + pinctrl-names = "ch0-active", "ch0-idle", "ch1-active", "ch1-idle",
> + ....;
> + pinctrl-0 = <&pinctrl_pwm0_ch0_active>;
> + pinctrl-1 = <&pinctrl_pwm0_ch0_idle>;
> + pinctrl-2 = <&pinctrl_pwm0_ch1_active>;
> + pinctrl-3 = <&pinctrl_pwm0_ch1_idle>;
> + ...
> + fsl,pwm-counter-clk = "ftm0_ext_sel";
> + fsl,pwm-avaliable-chs = <0 3 5 6>;
I don't think this proerty is useful. Just enable all channels. I think
this was mentioned before.
Sascha
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