[PATCHv3 1/4] arm: dts: Add clock entries for timers in SOCFPGA

[Dinh Nguyen]

Hi Steffen,

On Wed, 2013-08-28 at 17:31 +0200, Steffen Trumtrar wrote:
> Hi!
> 
> On Wed, Aug 21, 2013 at 03:53:44PM -0500, dinguyen at altera.com wrote:
> > From: Dinh Nguyen <dinguyen at altera.com>
> > 
> > Set the correct clock entries for the the timers, and also clean up
> > the timer entries for SOCFPGA by removing timer<n> in the timer entry.
> > 
> > Signed-off-by: Dinh Nguyen <dinguyen at altera.com>
> > CC: Rob Herring <rob.herring at calxeda.com>
> > Cc: Pawel Moll <pawel.moll at arm.com>
> > Cc: Mark Rutland <mark.rutland at arm.com>
> > Cc: Stephen Warren <swarren at wwwdotorg.org>
> > Cc: Ian Campbell <ian.campbell at citrix.com>
> > CC: Arnd Bergmann <arnd at arndb.de>
> > Cc: Olof Johansson <olof at lixom.net>
> > CC: Jamie Iles <jamie at jamieiles.com>
> > Cc: John Stultz <john.stultz at linaro.org>
> > Cc: Heiko Stuebner <heiko at sntech.de>
> > Cc: Pavel Machek <pavel at denx.de>
> > Cc: devicetree at vger.kernel.org
> > Cc: linux-arm-kernel at lists.infradead.org
> > ---
> >  arch/arm/boot/dts/socfpga.dtsi         |   16 ++++++++--------
> >  arch/arm/boot/dts/socfpga_cyclone5.dts |    8 ++++----
> >  arch/arm/boot/dts/socfpga_vt.dts       |    8 ++++----
> >  3 files changed, 16 insertions(+), 16 deletions(-)
> > 
> > diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
> > index 9706767..9957bae 100644
> > --- a/arch/arm/boot/dts/socfpga.dtsi
> > +++ b/arch/arm/boot/dts/socfpga.dtsi
> > @@ -26,10 +26,6 @@
> >  		ethernet1 = &gmac1;
> >  		serial0 = &uart0;
> >  		serial1 = &uart1;
> > -		timer0 = &timer0;
> > -		timer1 = &timer1;
> > -		timer2 = &timer2;
> > -		timer3 = &timer3;
> >  	};
> >
> 
> Yes. Do that.
> 
> >  	cpus {
> > @@ -486,28 +482,32 @@
> >  			interrupts = <1 13 0xf04>;
> >  		};
> >  
> > -		timer0: timer0 at ffc08000 {
> > +		timer at ffc08000 {
> 
> No. Why? Than I can not write something like
> 
> &timer0 {
> 	clock-frequency = <100000000>;
> };
> 
> and would have to reference the whole tree ala
> 
> / {
> 	soc {
> 		timer at ffc08000 {
> 			clock-frequency = <100000000>;
> 		};
> 	};
> };
> 
> in a boardspecific or SoC specific file (see below).

Agreed. Will adjust accordingly.

> 
> > diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dts b/arch/arm/boot/dts/socfpga_cyclone5.dts
> > index 698dde9..c1af01c 100644
> > --- a/arch/arm/boot/dts/socfpga_cyclone5.dts
> > +++ b/arch/arm/boot/dts/socfpga_cyclone5.dts
> >  
> > diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
> > index 6f23121..72ff14c 100644
> > --- a/arch/arm/boot/dts/socfpga_vt.dts
> > +++ b/arch/arm/boot/dts/socfpga_vt.dts
> 
> Leads me to a question about terminology: Is the cyclone5 an actual board?
> AFAIK it is. And the Cyclone 5 FPGA is also called socfpga? Is that correct?
> But then, seeing that, in an other patch, you add two different sysmgr addresses to
> the socfpga_vt and socfpga_cyclone5, there are different socfpgas?

Yes, sofpga_cyclone5.dts is the devkit that is manufactured by Altera.
socfpga_vt.dts is a virtual platform for SOCFPGA. You can get the
virtual platform from Synopsis. It mimics everything except the FPGA. 

socfpga is the base SOC with a Cyclone 5 FPGA on it. I'll be upstreaming
socfpga_arria5 soon, which has the SOCFPGA + Arria 5 FPGA.

> 
> I want to write a devicetree for the SoCkit. It has a Cyclone 5 on it.
> So naturally I would now go and include the socfpga_cyclone5.dtsi, with all the
> cyclone5 stuff and just add my board specific stuff in a socfpga_sockit.dts.
> But there is no socfpga_cyclone5.dtsi, just the socfpga_cyclone5.dts, which itself
> seems to be a board...

socfpga.dtsi is the base DTSI for the platform. In hindsight, I should
have named it a bit different, but for now socfpga_cyclone5 is for the
board.

> 
> So, how should we reorder the current dts (as I tested with current mainline, the
> support is completely broken out of the box, but works fine with your patches that
> are floating around, there should be no users as of now)?

Not sure what you mean by broken. I was able to boot 3.11-rc7 just now
using an initramfs. As you can already tell, I'm doing my best to get
more support for the platform upstream, but it will take time.

In the meantim, you get our latest downstream kernel at:

git://git.rocketboards.org/linux-socfpga.git

Dinh

> 
> Something like:
> 
> socfpga.dtsi
>  -> socfpga_cyclone5.dtsi
>  --> socfpga_cyclone5_devboard.dts (?)
>  --> socfpga_sockit.dts
>  -> socfpga_???.dtsi
>  --> socfpga_vt.dts
> 
> ?
> 
> Thanks and regards,
> Steffen
>