[PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock

Linus Walleij linus.walleij at linaro.org
Wed Aug 21 04:17:59 EDT 2013


On Thu, Jun 6, 2013 at 2:17 PM, Lee Jones <lee.jones at linaro.org> wrote:

> This patch enables clocks to be specified from Device Tree via phandles
> to the "prcc-kernel-clock" node.
>
> Cc: Mike Turquette <mturquette at linaro.org>
> Cc: Ulf Hansson <ulf.hansson at linaro.org>
> Signed-off-by: Lee Jones <lee.jones at linaro.org>
(...)
>  static struct clk *prcmu_clk[PRCMU_NUM_CLKS];
>  static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
> +static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
>
>  #define PRCC_SHOW(clk, base, bit) \
>         clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit]
> @@ -540,110 +541,136 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
>         clk = clk_reg_prcc_kclk("p1_uart0_kclk", "uartclk",
>                         clkrst1_base, BIT(0), CLK_SET_RATE_GATE);
>         clk_register_clkdev(clk, NULL, "uart0");
> +       PRCC_KCLK_STORE(clk, 1, 0);
>
>         clk = clk_reg_prcc_kclk("p1_uart1_kclk", "uartclk",
>                         clkrst1_base, BIT(1), CLK_SET_RATE_GATE);
>         clk_register_clkdev(clk, NULL, "uart1");
> +       PRCC_KCLK_STORE(clk, 1, 1);

(etc)

On device tree boots, clk_register_clkdev() is obviously pointless,
as you're later deleting the AUXDATA connecting that device name
to the clock.

This should not be called at all on the DT boot path.

However this looks cluttered as well:

if (dt_probe)
  clk_register_clkdev(clk, NULL, "uart0");
else
  PRCC_KCLK_STORE(clk, 1, 0);

Isn't it possible to fork a function u8500_clk_init_dt() to add all the
clocks in the DT probe path and keep this function
u8500_clk_init() as it is?

Yours,
Linus Walleij



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