[PATCH 4/5] clk: tegra: Set the clock parent of gr2d/gr3d to pll_c2

[Peter De Schrijver]

On Wed, Aug 07, 2013 at 01:25:08PM +0200, Mark Zhang wrote:
> pll_m will be the parent of gr2d/gr3d if we don't do this.
> And because pll_m runs at a high rate so gr2d/gr3d will be
> unstable. So change the parent of them to pll_c2.
> 
> Signed-off-by: Mark Zhang <markz at nvidia.com>

Acked-By: Peter De Schrijver <pdeschrijver at nvidia.com>