[PATCHv3 4/9] ARM: OMAP2+: AM33XX: Reserve memory to comply with EMIF spec
santosh.shilimkar at ti.com
Thu Aug 8 15:31:43 EDT 2013
On Thursday 08 August 2013 02:16 PM, Kevin Hilman wrote:
> Dave Gerlach <d-gerlach at ti.com> writes:
>> From: Vaibhav Bedia <vaibhav.bedia at ti.com>
>> SDRAM controller on AM33XX requires that a modification of certain
>> bit-fields in PWR_MGMT_CTRL register (ref. section 22.214.171.124 in
>> AM335x-Rev H) is followed by a dummy read access to SDRAM. This
>> scenario arises when entering a low power state like DeepSleep.
>> To ensure that the read is not from a cached region we reserve
>> some memory during bootup using the arm_memblock_steal() API.
> Hmm, sounds to me an awful lot like the existing omap_bus_sync() ?
All the credit of that awful omap_bus_sync() goes to me since
I introduced it. And I keep beating the hardware guys
who have not left a choice but to introduce the ugly work
around in software. ;-)
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