[PATCH] ARM: KVM: iterate over all CPUs for CPU compatibility check

[Peter Maydell]

On 15 April 2013 15:26, Andre Przywara <andre.przywara at linaro.org> wrote:
> But meanwhile I compared the A7 and A15 TRM 4.3.32 HSCTLR:
> Bit 21 is fixed 0 on A15, but fixed 1 on A7.
> Can someone confirm that this is not a typo?

The A7 TRM diagram says '1' but the text says RAZ/WI.
The bit should match SCTLR.FI (bit 21), which the A7 TRM
definitely says is RAZ/WI. If you have the hardware you
can confirm the behaviour yourself by reading the register
and seeing what the bit value is :-)

-- PMM