[PATCH v2 1/1 net] enet: fec: fix fail resume from suspend state

[Fabio Estevam]

Hi Markus,

On Fri, Apr 12, 2013 at 12:32 PM, Markus Niebel <list-09 at tqsc.de> wrote:

> Which clock is connected to the PHY? Is it the enet_clock generated by i.MX28? Is the connection between PHY and i.MX28 RMII?

Yes, on mx28evk it is the ENET_CLK pin on mx28 that drives the LAN8270
PHY clock. The connection is RMII.


> If the FEC goes through a reset the clock generated by i.MX28 may switched to MII (25 MHz). Maybe the PHY gets confused if it is working in RMII mode.
>

Thanks for the suggestion, but I also tried not to turn off/on the
enet_clk and the issue also happens when enet_clk is kept constantly
at 50MHz.