Anyone implement Cortex A9 FIQ
Dave Martin
dave.martin at linaro.org
Mon Apr 8 12:28:44 EDT 2013
On Tue, Mar 19, 2013 at 03:49:50PM +0800, Frank Li wrote:
> >
> > Whether this is feasible will really depend on what platform you're on - if
> > there's a secure monitor then FIQs are out of the question anyway. Can you
> > tell us more about the system?
>
> Freescale MX6Q.
>
> >
> > If your average interrupt latency is low then you should just be able to do
> > this with normal IRQs (have you got threaded interrupt handlers?)
>
> Not all drivers use threaded interrupt handler.
>
> >
> > What is it about the situation that leads you to believe that you *need*
> > FIQ?
>
> FIQ can be executed even in spin_lock_saveirq.
> We want do very small hardware set at related precision period (every 125us).
Why is the latency requirement so tight for this one interrupt?
Cheers
---Dave
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