[PATCH] Revert "OMAP/serial: Fix incorrect Rx FIFO threshold setting, LSR validation on Tx, and Tx FIFO IRQ generation"

[Alexey Pelykh]

Hi

On Wed, Apr 3, 2013 at 11:21 PM, Paul Walmsley <paul at pwsan.com> wrote:
> Hi,
>
> On Wed, 3 Apr 2013, Alexey Pelykh wrote:
>
>> But, since we've found the issue, I suggest that we should look at it
>> closer, especially since at this moment only you can reproduce it. As
>> far as I understand, but I may be wrong,
>> this comment is wrong, since if to specify
>> OMAP_UART_SCR_RX_TRIG_GRANU1_MASK, it effectively sets Rx threshold to
>> 1 character, instead of 16.
>> /* Set receive FIFO threshold to 16 characters and
>>  * transmit FIFO threshold to 16 spaces
>>  */
>
> If you want to continue to experiment with it, I'd be willing to do an
> occasional test boot on 37xx EVM.  It's nice to see community patches...
>

I'm pretty sure that current configuration of UART indeed sets Rx FIFO
threshold to
1 character, as opposite to 16 characters mentioned in comments. Kernel 3.3
is the origin of Rx 1-char-granularity bit setting, but states clearly
that Rx FIFO
is being set to 1 character in non-DMA mode. The comment appears between
3.6 and 3.7 in commit 6721ab7f77f2614ab43e3de2f908b1d7436331df by Felipe Balbi.
3.0-3.2 kernels don't have 1-char-granularity enabled, and Rx FIFO
threshold level
was effectively set to 16 characters, what should be the same as my
patch that turned off
1-char-granularity

Paul, can you confirm (if possible, surely) if 3.0-3.2 kernels had same issue?

Felipe, it would be great to get your comments on this?

>
> - Paul