[RFC 1/4] ARM: OMAP3: cpuidle: Remove unused MPU OSWR support code
Rajendra Nayak
rnayak at ti.com
Mon Jul 23 03:10:02 EDT 2012
Hi Paul,
On Friday 20 July 2012 11:55 PM, Paul Walmsley wrote:
> On Fri, 20 Jul 2012, Rajendra Nayak wrote:
>
>> We do not support MPU OSWR on OMAP3. Get rid of the complex/multiple
>> save_state handling in omap_sram_idle() and just use 2 save_state
>> definitions
>>
>> save_state = 1, all logic and memory lost, MPU hits OFF
>> save_state = 0, nothing lost, MPU hits CSWR or shallower state
>>
>> Signed-off-by: Rajendra Nayak<rnayak at ti.com>
>
> The code is certainly simpler, but I recall seeing patchsets in the past
> that implemented OSWR on OMAP3. (Not sure which powerdomains it was
> implemented for.) Do you know what the status of those patchsets are?
OMAP3 supports OSWR for MPU/IVA/CORE and PER powerdomains. Though we did
have some OSWR implementations in our internal trees, we never ended up
using them effectively, mainly because the latencies for OSWR as
compared to OFF were very close on OMAP3 and the power savings from OFF
(given we could hit 0v) significantly higher.
OSWR on OMAP4 was hence reworked to keep much more retained in OSWR and
make it, in latency terms, something _in_between_ a CSWR and OFF.
Someone at some point (I don't recall and it could have even been me)
would have tried to upstream the OSWR support from our internal trees,
but as of now I don't know if anyone is trying to push or interested in
OSWR support for OMAP3 anymore.
regards,
Rajendra
>
> - Paul
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