[PATCH 5/6] Clk: SPEAr1340: fix sys clock parent source and corresponding mask value

[viresh kumar]

On Mon, Jul 9, 2012 at 1:04 PM, vipul kumar samar
<vipulkumar.samar at st.com> wrote:
> On 7/9/2012 4:34 PM, viresh kumar wrote:
>>
>> On Mon, Jul 9, 2012 at 11:31 AM, Shiraz Hashim<shiraz.hashim at st.com>
>> wrote:
>>>
>>> From: Vipul Kumar Samar<vipulkumar.samar at st.com>
>>>
>>> sys_clk have multiple parents and selection of parent is depends on
>>
>>
>> s/ is//

I hope you haven't missed this comment :)

>>>   static const char *vco_parents[] = { "osc_24m_clk", "osc_25m_clk", };
>>> -static const char *sys_parents[] = { "none", "pll1_clk", "none", "none",
>>> -       "sys_synth_clk", "none", "pll2_clk", "pll3_clk", };
>>> +static const char *sys_parents[] = { "pll1_clk", "pll1_clk", "pll1_clk",
>>> +       "pll1_clk", "sys_synth_clk", "sys_synth_clk", "pll2_clk",
>>> "pll3_clk", };
>>
>>
>> Don't know what would be the implication of this?
>>
>> @Mike: Can you please tell us what should we do in such cases?
>>
>
> Is there any other solution for such cases ???

That's what i have asked mike for :)
Probably you can go through the clock framework code and check how these
names are used. Shouldn't be too complex to understand.

--
viresh