[PATCH v5 3/3] ARM: OMAP2+: onenand: prepare for gpmc driver migration

Mohammed, Afzal afzal at ti.com
Mon Jul 2 05:43:21 EDT 2012


Hi Tony,

On Mon, Jul 02, 2012 at 12:06:51, Tony Lindgren wrote:
> * Jon Hunter <jon-hunter at ti.com> [120628 09:48]:

> > The above change seems to imply that Tony's n900 is dependent on the bootloader settings
> > and not those being set by the kernel. Ideally, we should not need to set the async mode
> > in the onenand before we set the onenand timings in the gpmc (per Afzal's changelog
> > comment). This appears backwards.
> 
> That should not be the case, I'm more likely to believe in Afzal's explanation.

Not sure whether you are fine with fixing up this patch with added diff

Assuming inferences so far is not wrong, right now this patch with the added diff
would be perfectly fine.

Problem would happen when we are at a stage to do gpmc reset using hwmod [seems
miles to go before I sleep {or read gpmc hwmod reset} ;)]. If bootloader left
onenand configured in sync mode, to switch onenand to async mode, first configuring
gpmc to sync mode would be required & for that we need frequency information
from onenand and to get that information from onenand, gpmc has to be configured
for sync mode and to configure gpmc to sync mode ....

Seems like chicken and egg problem.

N900, I believe is board-rx51, could not get proper schematic for onenand
connections, nor do I have the Numonyx datsheet, or the board, hence not
sure whether resetting onenand may resolve the issue. But if you feel that
it is the right solution & it would resolve the issue, and if you can let
me know gpio connected (if any) to onenand reset or else some pointers to
achieving it, I can try making a patch to do onenand reset

Regards
Afzal



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