[PATCH] ARM: mx28: Clear CLKGATE bit prior to changing DIV field

[Dong Aisheng-B29396]

> -----Original Message-----
> From: Fabio Estevam [mailto:festevam at gmail.com]
> Sent: Thursday, January 19, 2012 12:45 PM
> To: Shawn Guo
> Cc: Lothar Waßmann; Estevam Fabio-R49496; w.sang at pengutronix.de;
> marek.vasut at gmail.com; linux-arm-kernel at lists.infradead.org;
> kernel at pengutronix.de; Guo Shawn-R65073; Dong Aisheng-B29396
> Subject: Re: [PATCH] ARM: mx28: Clear CLKGATE bit prior to changing DIV field
> Importance: High
> 
> 2012/1/19 Shawn Guo <shawn.guo at linaro.org>:
> 
> > As far as I know, mxs-saif driver also has one clk_set_rate() being
> > called with the clock gated.
> 
> Yes, correct. Is this a good fix?
> 
> diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c index
> dccfb37..c5a29a8 100644
> --- a/sound/soc/mxs/mxs-saif.c
> +++ b/sound/soc/mxs/mxs-saif.c
> @@ -124,6 +124,8 @@ static int mxs_saif_set_clk(struct mxs_saif *saif,
>          *
>          * If MCLK is not used, we just set saif clk to 512*fs.
>          */
> +       clk_prepare_enable(master_saif->clk);
> +
>         if (master_saif->mclk_in_use) {
>                 if (mclk % 32 == 0) {
>                         scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE; @@ -133,6 +135,7
> @@ static int mxs_saif_set_clk(struct mxs_saif *saif,
>                         ret = clk_set_rate(master_saif->clk, 384 * rate);
>                 } else {
>                         /* SAIF MCLK should be either 32x or 48x */
> +                       clk_disable_unprepare(master_saif->clk);
>                         return -EINVAL;
>                 }
>         } else {
> @@ -140,6 +143,8 @@ static int mxs_saif_set_clk(struct mxs_saif *saif,
>                 scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE;
>         }
> 
> +       clk_disable_unprepare(master_saif->clk);
> +
>         if (ret)
>                 return ret;
> 
The change looks ok to me.
If the test is ok, I will ack this patch.

Regards
Dong Aisheng