Pinmux bindings proposal

Stephen Warren swarren at nvidia.com
Wed Jan 18 15:02:21 EST 2012


Tony Lindgren wrote at Wednesday, January 18, 2012 7:13 AM:
> * Grant Likely <grant.likely at secretlab.ca> [120116 09:55]:
> > On Fri, Jan 13, 2012 at 12:39:42PM -0800, Stephen Warren wrote:
> > >                 pinmux =
> > >                         <"default" &pmx_sdhci_active>
> > >                         <"suspend" &pmx_sdhci_suspend>;
> > >
> > >                 /* 1:n example: */
> > >                 pinmux =
> > >                         <"default" &pmx_sdhci_mux_a>
> > >                         <"default" &pmx_sdhci_pincfg_a>
> > >                         <"suspend" &pmx_sdhci_mux_a>
> > >                         <"suspend" &pmx_sdhci_pincfg_a_suspend>;
> >
> >
> > Yeah, don't do this.  Mixing phandle, string and cell values in a
> > property gets messy and could become troublesome to parse.  I've
> > backed away from it in the clk binding.
> 
> Yup, that's because the string is embedded directly into the mixed
> mode array and will likely make the following data unaligned. That
> means it's extremely flakey to parse, and will lead into horrible
> errors if you have typos in the .dts file.. Tried that and gave up
> on it.
> 
> I think I've found a way to avoid using names at all, assuming we set
> each pin as a phandle for the drivers to use :)

I'd prefer not to do that for my platforms, for the reason Shawn points
out in his reply to yours.

However, I believe the bindings I proposed are flexible enough to allow
you to do exactly this for your platforms without requiring that everyone
do it.

Recall my proposal was:

pmx_sdhci_standby: pinctrl at 0 {
    /* Format is <&pmx_controller_phandle muxable_entity_id
     * selected_function>.
     */
    mux =
        <&tegra_pmx TEGRA_PMX_PG_DTA TEGRA_PMX_MUX_1>
        <&tegra_pmx TEGRA_PMX_PG_DTD TEGRA_PMX_MUX_1>;
    config =
        <&tegra_pmx TEGRA_PMX_PG_DTA TEGRA_PMX_CONF_TRISTATE 1>
        <&tegra_pmx TEGRA_PMX_PG_DTD TEGRA_PMX_CONF_TRISTATE 1>
        <&tegra_pmx TEGRA_PMX_PG_DTA TEGRA_PMX_CONF_DRIVE_STRENGTH 5>
        <&tegra_pmx TEGRA_PMX_PG_DTD TEGRA_PMX_CONF_DRIVE_STRENGTH 5>
        <&tegra_pmx TEGRA_PMX_PG_DTA TEGRA_PMX_CONF_SLEW_RATE 4>
        <&tegra_pmx TEGRA_PMX_PG_DTD TEGRA_PMX_CONF_SLEW_RATE 8>;
};

(Note that I think we've agreed to remove the first cell above, &tegra_pmx,
now by requiring such nodes exist as children of the pin controller.)

My assertion is that the common pinmux bindings define that the
Interpretation of muxable_entity_id is left up to the binding of the
specific pin controller. Hence, I can says "it's an integer, and here
is the list of valid values and what they mean", and you can say "it's
a phandle, which must refer to one of the per-pin nodes defined by the
pin controller".

Does that work for you?

-- 
nvpublic




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