[PATCH V1] ARM: tegra: Pause DMA when reading transfer count
Stephen Warren
swarren at nvidia.com
Wed Jan 11 15:48:26 EST 2012
Laxman Dewangan wrote at Monday, January 09, 2012 11:05 PM:
> In order to read an accurate channel transfer count
> from the APB DMA engine, the DMA controller must be
> paused first.
>
> Signed-off-by: Laxman Dewangan <ldewangan at nvidia.com>
Acked-by: Stephen Warren <swarren at nvidia.com>
Tested-by: Stephen Warren <swarren at nvidia.com>
(Audio playback on Harmony booted using device tree works fine in my
brief testing)
--
nvpublic
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