mxs: enable phy-clock in the driver?

[Marek Vasut]

> Hi Shawn,
> 
> I recently noticed that my tx28 board did not have net when booting from
> NAND (before that, barebox was setting up the network). Adding lines like
> these from mx28evk helped:
> 
> 228         /* Enable fec phy clock */
> 229         clk = clk_get_sys("pll2", NULL);
> 230         if (!IS_ERR(clk))
> 231                 clk_enable(clk);
> 
> So, if every board seems to need this, I'd think this should rather be in
> the driver? Am I correct or is there something I have overlooked?
> 
> Regards,
> 
>    Wolfram

Did you really disable the clock to FEC or only the PHY didn't have clock?

M